Patents Assigned to NEC Plasma Display Corporation
  • Publication number: 20040108975
    Abstract: The method for driving a plasma display panel having a first substrate on which a plural of first electrodes and a plural of second electrodes are placed in parallel to each other, and a second substrate on which a plural of third electrodes placed so as to face the plurality of first and second electrodes and formed in a manner that the plurality of the third electrodes is extended in a direction orthogonal to the plurality of the first and second electrodes, the method including: a step of applying a voltage having an inclined waveform which changes with time to the first or second electrode; and a step of setting time of occurrence of discharge so that, in each of the display cells, time of occurrence of facing discharge between the first or second electrode to which the voltage having the inclined waveform is applied and the third electrode comes earlier than earliest time of occurrence of surface discharge between the first and second electrodes corresponding to each other.
    Type: Application
    Filed: November 17, 2003
    Publication date: June 10, 2004
    Applicant: NEC PLASMA DISPLAY CORPORATION
    Inventor: Kota Araki
  • Patent number: 6747414
    Abstract: A plasma display panel is provided which is capable of improving efficiency of light emission and of achieving a stable operation with a driving margin being kept wide by keeping a discharge initiating voltage low and by maintaining an erroneous discharge voltage high. Each of first electrode portions of transparent electrodes formed on a first substrate forms a clearance being smaller than a width of each of partition walls on each of the partition walls formed between discharge cells being adjacent to each other in a row direction on a screen. Each of second electrode portions is formed apart from each of the partition walls. Each of third electrode portions is so constructed that its width in the row direction on the screen is smaller than that of each of second electrode portions.
    Type: Grant
    Filed: October 28, 2002
    Date of Patent: June 8, 2004
    Assignee: NEC Plasma Display Corporation
    Inventor: Kunio Yoshida
  • Publication number: 20040095356
    Abstract: A method for accessing a frame memory integrated within a display panel driver driving a display panel is composed of serially performing write operations for writing sub-field data of a pixel line within the display panel for a plurality of sub-fields into the frame memory, and serially performing read operations for reading sub-field data of a plurality of pixel lines for a sub-field from the frame memory. At least two of the write operations are allowed to be performed between adjacent two of the read operations.
    Type: Application
    Filed: November 17, 2003
    Publication date: May 20, 2004
    Applicant: NEC PLASMA DISPLAY CORPORATION
    Inventors: Toshiaki Inoue, Katsuyuki Hashimoto
  • Publication number: 20040076739
    Abstract: A phosphor paste is applied to inner surfaces of a cell. Then, a conveyer moves a substrate relative to a CCD camera at a constant speed. Simultaneously, two LEDs radiate visible light onto a portion, to be inspected, of the substrate. The visible light is light configured to have a wavelength so as to be able to prevent the phosphor of the phosphor paste from being excited and emitting light and reflected by a liquid surface of the phosphor paste to produce reflected light. Thereafter, the CCD camera captures an image of the phosphor paste and a data processor processes the received image data, and determines whether a phosphor layer formed by drying the phosphor paste will normally be formed, prior to formation of phosphor layer.
    Type: Application
    Filed: July 3, 2003
    Publication date: April 22, 2004
    Applicant: NEC PLASMA DISPLAY CORPORATION
    Inventors: Shinji Yokono, Kazumasa Nishiwaki
  • Patent number: 6720941
    Abstract: A method for driving a surface-discharge AC (alternating current)-type PDP (Plasma Display Panel) is provided which is capable of shortening a scanning period by securing a wide range in which a voltage to induce sustaining discharge can be set without causing flicker to occur and without causing black luminance to be increased. A sub-field is made up of a resetting period, a scanning period, a wall charge forming period, and a sustaining period. During the scanning period, time interval between scanning pulses is shortened. During the wall charge forming period, each of common electrodes and data electrodes is made to be at a ground potential and a wall charge forming pulse having a same potential as that of a scanning pulse is applied to all scanning electrodes. The time interval between wall charge forming pulses is for example 3 &mgr;sec to 50 &mgr;sec. This causes space charges being left in a display cell to be attracted on each of electrodes, whereby wall charges build up.
    Type: Grant
    Filed: December 2, 2002
    Date of Patent: April 13, 2004
    Assignee: NEC Plasma Display Corporation
    Inventor: Yukinori Kashio
  • Publication number: 20040046505
    Abstract: A rear substrate in a plasma display panel including a first substrate through which an image is transmitted to a viewer, and the rear substrate arranged in facing relation to the first substrate, includes (a) an electrically insulating substrate, (b) a plurality of data electrodes arranged on the substrate and spaced away from one another, (c) a plurality of partition walls formed on the substrate, and (d) a phosphor layer covering the substrate and the data electrodes therewith between adjacent partition walls, wherein at least one partition wall and another partition wall among the partition walls are joined to each other at at least one of opposite ends thereof in a length-wise direction through a curved partition wall, the another partition wall extending in the same direction as a direction in which the at least one partition wall extends.
    Type: Application
    Filed: September 9, 2003
    Publication date: March 11, 2004
    Applicant: NEC PLASMA DISPLAY CORPORATION
    Inventor: Yoshitaka Kawanishi
  • Publication number: 20030234753
    Abstract: A method of drives a plasma display panel including first and second substrates facing each other, a plurality of first and second electrodes extends on the first substrate in a first direction such that each of the second electrodes makes a pair with each of the first electrodes located adjacent thereto, and a plurality of third electrodes extending on the second substrate in a second direction perpendicular to the first direction. The method includes the steps of dividing a field into a plurality of sub-fields having at least two weighted luminance, (b) selecting whether discharge is to be generated between the first or second and third electrodes for controlling a gray scale, (c) weighting the luminance by varying the number of application of sustaining pulses to the first or second electrode, and (d) stopping application of the sustaining pulses in at least one sub-field among the plurality of sub-fields.
    Type: Application
    Filed: June 20, 2003
    Publication date: December 25, 2003
    Applicant: NEC PLASMA DISPLAY CORPORATION
    Inventor: Yoshito Tanaka
  • Publication number: 20030218434
    Abstract: In a circuit for driving a plasma display panel including a first circuit formed on a scanning substrate for driving a scanning electrode, and a second circuit formed on a common substrate for driving a common electrode, the circuit in accordance with the present invention is characterized by including a single substrate in place of the scanning and common substrates wherein the first and second circuits are formed on the single substrate.
    Type: Application
    Filed: May 16, 2003
    Publication date: November 27, 2003
    Applicant: NEC PLASMA DISPLAY CORPORATION
    Inventors: Mitsuhiro Ishizuka, Shinobu Sato, Teruo Okamura
  • Publication number: 20030218778
    Abstract: An error diffusion processing circuit includes an error diffusion processing unit and a noise signal unit. The error diffusion processing unit generates a first output image signal of a first pixel by carrying out an error diffusion process, based on an inputted first input image signal of the first pixel. The number of gray tones of the first output image signal is smaller than that of the input image signal. The noise signal unit which generates a noise signal and outputs the noise signal to the error diffusion processing unit. The noise signal is inputted into a feedback loop of the error diffusion process.
    Type: Application
    Filed: May 15, 2003
    Publication date: November 27, 2003
    Applicant: NEC PLASMA DISPLAY CORPORATION
    Inventor: Mutsumi Ohta
  • Publication number: 20030193451
    Abstract: A display device operating in accordance with a sub-field process, includes a first block which varies the number of bits of a received image signal, a second block which calculates an average picture level (APL) of images defined by the image signal transmitted from the first block, a third block which converts the image signal into sub-field coding data, and outputs the sub-field coding data to a display panel, and a fourth block which receives the average picture level from the second block, converts the received average picture level to the number of sustaining pulses, transmits the number of sustaining pulses to the display panel, and transmits the number of sustaining pulses to the third block, wherein the third block selects the number of bits of a signal to be input thereinto, in accordance with the number of sustaining pulses received from the fourth block.
    Type: Application
    Filed: April 10, 2003
    Publication date: October 16, 2003
    Applicant: NEC PLASMA DISPLAY CORPORATION
    Inventor: Tohru Kimura
  • Publication number: 20030184502
    Abstract: A method of driving a plasma display panel including a plurality of scanning electrodes covered with a dielectric layer, and a plurality of sustaining electrodes covered with a dielectric layer, including the steps of (a) applying scanning pulses in time-division to the scanning electrodes in an addressing period in which a cell or cells emitting light is(are) selected, and applying sustaining pulses to the sustaining electrodes in a sustaining period for generating preliminary discharge and preliminary erasing discharge before the cell or cells emitting light is(are) selected, and (b) applying a serrate pulse to the scanning or sustaining electrodes when the preliminary erasing discharge is generated, the serrate pulse having an inclination smaller than 10 V/&mgr;s, wherein a period of time until the generation of the preliminary erasing discharge from the termination of the preliminary discharge is set shorter than 3T where T indicates a decay time constant of priming particles.
    Type: Application
    Filed: March 21, 2003
    Publication date: October 2, 2003
    Applicant: NEC PLASMA DISPLAY CORPORATION
    Inventor: Mitsuyoshi Makino
  • Publication number: 20030179161
    Abstract: A method of operating a circuitry including a video data signal processing circuitry generating a video data signal and a data clock signal in response to an input video data signal, and a data electrode driver driving a plasma display panel in response to the video data signal. The method is composed of: allowing an initial setting storage unit to output an initial setting data signal representative of an initial setting of the video data signal processing circuitry, placing the video data signal processing circuitry in the initial setting in response to the initial setting data signal, producing a mute signal in response to the initial setting data signal, and disabling and enabling at least one of the video data signal processing circuitry and the data electrode driver in response to the mute signal.
    Type: Application
    Filed: March 19, 2003
    Publication date: September 25, 2003
    Applicant: NEC PLASMA DISPLAY CORPORATION
    Inventor: Yasumitsu Yamamoto
  • Publication number: 20030141824
    Abstract: A plasma display panel including a plurality of cells arranged in a matrix, wherein each of the cells includes (a) a scanning electrode having partial cutout, (b) a sustaining electrode having partial cutout, spaced away from the scanning electrode by a discharge gap in mirror-symmetry with a centerline of the discharge gap extending in a first direction, (c) a first trace electrode extending in the first direction on the opposite side of the scanning electrode about the discharge gap such that the first trace electrode makes electrical contact with the scanning electrode and further with a scanning electrode of an adjacent cell, and (d) a second trace electrode extending in the first direction on the opposite side of the sustaining electrode about the discharge gap such that the second trace electrode makes electrical contact with the sustaining electrode and further with a sustaining electrode of an adjacent cell.
    Type: Application
    Filed: January 30, 2003
    Publication date: July 31, 2003
    Applicant: NEC PLASMA DISPLAY CORPORATION
    Inventor: Hajime Homma
  • Publication number: 20030122739
    Abstract: An AC-type plasma display panel and a method for driving the AC-type plasma display panel are provided which are capable of reducing discharge leak (crosstalk) between cells being adjacent to each other and of increasing operating range. The AC-type plasma display panel has two insulating substrates both facing each other. On one insulating substrate is formed a plurality of scanning electrodes and a plurality of sustaining electrodes. On another insulating substrate is formed a plurality of data electrodes. Each of the scanning electrodes is made up of each of bus electrodes and each of main discharge electrodes.
    Type: Application
    Filed: December 27, 2002
    Publication date: July 3, 2003
    Applicant: NEC PLASMA DISPLAY CORPORATION
    Inventor: Kota Araki
  • Publication number: 20030122744
    Abstract: A plasma display device is provided which is capable of preventing image disturbance and imposition of excessive loads even when resolution is switched. A vertical frequency counter counts vertical sync signals using system clocks and a vertical frequency comparator checks whether or not the value obtained from the counting matches up with a vertical frequency decoded value. A line number counter counts vertical sync signals using horizontal sync signals and a line number comparator checks whether or not the value obtained from the counting matches up with a line number decoded value. A dot number counter counts horizontal sync signals using analog digital clocks and a dot number comparator checks whether or not the value obtained from the counting matches up with a dot number decoded value. These values are ORed by an OR circuit and the result is output in a form of a mode monitoring detection signal.
    Type: Application
    Filed: December 27, 2002
    Publication date: July 3, 2003
    Applicant: NEC PLASMA DISPLAY CORPORATION
    Inventors: Satoshi Fujita, Akihiro Kasai
  • Publication number: 20030102814
    Abstract: A method for driving a surface-discharge AC (alternating current) -type PDP (Plasma Display Panel) is provided which is capable of shortening a scanning period by securing a wide range in which a voltage to induce sustaining discharge can be set without causing flicker to occur and without causing black luminance to be increased. A sub-field is made up of a resetting period, a scanning period, a wall charge forming period, and a sustaining period. During the scanning period, time interval between scanning pulses is shortened. During the wall charge forming period, each of common electrodes and data electrodes is made to be at a ground potential and a wall charge forming pulse having a same potential as that of a scanning pulse is applied to all scanning electrodes. The time interval between wall charge forming pulses is for example 3 &mgr;sec to 50 &mgr;sec. This causes space charges being left in a display cell to be attracted on each of electrodes, whereby wall charges build up.
    Type: Application
    Filed: December 2, 2002
    Publication date: June 5, 2003
    Applicant: NEC PLASMA DISPLAY CORPORATION
    Inventor: Yukinori Kashio
  • Publication number: 20030095084
    Abstract: In a priming erasing period, a voltage Vpe1 is applied to a common electrode, and after an electric potential of a scanning electrode is discontinuously lowered to a positive electric potential lower than the voltage Vpe1, the electric potential is continuously lowered to a voltage Vpe2. In this case, an electric potential difference between the voltage Vpe1 and the voltage Vpe2 is set equal to a firing voltage. Also, an electric potential of the scanning electrode at an end of the priming erasing period is set higher than an electric potential of a data electrode by approximately 20 V. With this operation, there is provide an AC-type plasma display panel having an extended driving margin (range) of a sustaining voltage and capable of being driven by a low voltage.
    Type: Application
    Filed: November 21, 2002
    Publication date: May 22, 2003
    Applicant: NEC PLASMA DISPLAY CORPORATION
    Inventor: Eishi Mizobata
  • Publication number: 20030095083
    Abstract: By a method of the present invention, each field is made up of at least one sub-field, a sub-field of which is made up of a preliminary discharge period, a scanning period, and a sustaining period, the preliminary discharge period of which is made up of a sustaining erasing period, a priming period, and a priming erasing period, the sustaining erasing period of which is made up of a fist sustaining erasing period and a second sustaining erasing period. Negative wall charges are formed over both a scanning electrode and a common electrode in a display cell where sustaining discharge has occurred in an immediately preceding sub-field in the first sustaining erasing period and then are adjusted so that they may have almost the same amount in the second sustaining erasing period.
    Type: Application
    Filed: November 21, 2002
    Publication date: May 22, 2003
    Applicant: NEC PLASMA DISPLAY CORPORATION
    Inventor: Eishi Mizobata
  • Publication number: 20030080928
    Abstract: A method for driving an alternating current (AC) plasma display panel is provided which is capable of making sustaining light emission inconspicuous caused by erroneous discharge during a period when supply power becomes stable even if erroneous discharge occurs due to an influence of residual charges produced at a time of starting operations of the AC plasma display panel. A driving method for one frame is changed between a period (supply power stability waiting period) required until the supply power becomes stable and a display period. Time required until a voltage becomes stable is for example 0.5 seconds to 1 second after power-ON. In a field during this period, one field is divided into a plurality of sub-fields and the number of repeated pulses is smaller during a sustaining period of each sub-field than that of repeated pulses during a sustaining period of a sub-field in the display period. For example, no sustaining pulse is fed to a scanning electrode.
    Type: Application
    Filed: October 25, 2002
    Publication date: May 1, 2003
    Applicant: NEC PLASMA DISPLAY CORPORATION
    Inventors: Takatoshi Shoji, Yukinori Kashio
  • Publication number: 20030080690
    Abstract: A plasma display panel is provided which is capable of improving efficiency of light emission and of achieving a stable operation with a driving margin being kept wide by keeping a discharge initiating voltage low and by maintaining an erroneous discharge voltage high. Each of first electrode portions of transparent electrodes formed on a first substrate forms a clearance being smaller than a width of each of partition walls on each of the partition walls formed between discharge cells being adjacent to each other in a row direction on a screen. Each of second electrode portions is formed apart from each of the partition walls. Each of third electrode portions is so constructed that its width in the row direction on the screen is smaller than that of each of second electrode portions.
    Type: Application
    Filed: October 28, 2002
    Publication date: May 1, 2003
    Applicant: NEC PLASMA DISPLAY CORPORATION
    Inventor: Kunio Yoshida