Patents Assigned to NEC
  • Patent number: 7629834
    Abstract: A limiter circuit includes a differential amplifier circuit having a non-inverting and an inverting inputs, the inverting input fed with an input signal to the limiter circuit, a driving circuit fed with an output of the differential amplifier, a MOS transistor having a source, a drain and a gate, one of the source and the drain of the MOS transistor connected to an output of the driving circuit, the other of the source and the drain of the MOS transistor connected to the non-inverting input of the differential amplifier, the gate of the MOS transistor applied with a predetermined voltage, and a load circuit connected to the other of the source and the drain of the MOS transistor.
    Type: Grant
    Filed: March 16, 2007
    Date of Patent: December 8, 2009
    Assignee: NEC Electronics Corporation
    Inventor: Hayato Ogawa
  • Patent number: 7630889
    Abstract: A code conversion method for converting first code string data conforming to a first speech coding scheme into second code string data conforming to a second speech coding scheme has the steps of decoding the first code string data to generate a first decoded speech, correcting the signal characteristics of the first decoded speech to generate a second decoded speech, and encoding the second decoded speech in accordance with the second speech coding scheme to generate the second code string data.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: December 8, 2009
    Assignee: NEC Corporation
    Inventor: Atsushi Murashima
  • Patent number: 7630453
    Abstract: Disclosed is a method and a system for performing N-ary modulation in which bit errors may be reduced against symbol error. A binary signal, a bit length thereof being n, is associated with N-ary signals arranged in first and second phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 12 and sequentially doubled, that is, any one of 12, 24, 48, 96, . . . , and wherein n is such that, if the bit length n is 7, 9, 11, 13, . . . , the number N is 12, 24, 48, 96, . . . , respectively, two out of the n bits are allocated for identifying four quadrants of the first phase plane, two out of the remaining (n?2) bits are allocated for identifying four quadrants of the second phase plane. The binary signal of three out of the n bits is converted into two digits of ternary signals (T1, T2). The ternary signals are mapped to the first and second phase planes with rotational symmetry of 90° or with axial symmetry.
    Type: Grant
    Filed: March 8, 2005
    Date of Patent: December 8, 2009
    Assignee: NEC Corporation
    Inventor: Seiichi Noda
  • Patent number: 7630234
    Abstract: An MRAM having a first cell array group (2-0)and a second cell array group (2-1) containing a plurality of cell arrays (21) is used. Each of the first cell array group (2-0) and the second cell array group (2-1) includes a first current source unit for supplying a first write current IWBL to a bit line WBL of the cell array (21) and a first current waveform shaping unit having a first capacitor requiring precharge and shaping the waveform of the first write current IWBL. When the cell array (21) performs write into a magnetic memory (24), the first current waveform shaping unit of the first cell array group (2-0) and the first current waveform shaping unit of the second cell array group (2-1) charges and discharges electric charge accumulated in the first capacitor to wiring toward the bit line WBL at different periods from each other.
    Type: Grant
    Filed: September 7, 2006
    Date of Patent: December 8, 2009
    Assignee: NEC Corporation
    Inventors: Tadahiko Sugibayashi, Takeshi Honda, Noboru Sakimura
  • Patent number: 7630720
    Abstract: A content distribution system uses a PtP (point to point) channel (individual channel) or PtM (point to multi-point) channel (common channel) as a radio channel of a predetermined type so as to distribute a broadcast content as communication data to a user terminal as a mobile station. The user terminal receives the same content distributed from a broadcast content server by the PtP channel. Here, if the total of the downlink transmission power of the PtP channel is greater than the downlink transmission power of the PtM channel when the content is distributed to the user terminal by the single PtM channel, a base station or a base station control device judges that the radio channel is to be switched from the PtP channel to the PtM channel. Similar judgment is made when switching from the PtM channel to the PtP channel is performed. Thus, it is possible to switch the radio channel type used for the broadcast-type service without lowering the use effect of the radio resources.
    Type: Grant
    Filed: October 1, 2008
    Date of Patent: December 8, 2009
    Assignee: NEC Corporation
    Inventor: Masahiko Yahagi
  • Patent number: 7631279
    Abstract: A semiconductor integrated device includes a plurality of power system circuit units, a first circuit unit to which electric power is supplied from first power supply wiring, and first ground wiring to which the first circuit unit is coupled. Moreover, the semiconductor integrated device includes a second circuit unit to which electric power is supplied from second power supply wiring, and second ground wiring coupled to the second circuit unit. The first circuit unit includes a first interface circuit unit, and the second circuit unit includes a second interface circuit unit configured to perform inputting or outputting of a signal to and from the first interface circuit unit. The first ground wiring is coupled to the second ground wiring through a protection circuit, and the second interface circuit unit is placed in the vicinity of the first interface circuit unit.
    Type: Grant
    Filed: October 16, 2008
    Date of Patent: December 8, 2009
    Assignee: NEC Electronics Corporation
    Inventor: Morihisa Hirata
  • Patent number: 7630224
    Abstract: A semiconductor integrated circuit device includes a memory macro and M (M is an integer more than 1) passage wirings. The memory macro includes a memory cell array comprising memory cells which are arranged in a matrix, digit line pairs connected with the memory cells and extending in a column direction, and a column peripheral circuit connected with the digit line pairs and comprising a sense amplifier circuit. The M (M is an integer more than 1) passage wirings are arranged to extend in a row direction orthogonal to the digit line pairs. The arrangement of the M passage lines above the column peripheral circuit is forbidden.
    Type: Grant
    Filed: February 19, 2008
    Date of Patent: December 8, 2009
    Assignee: NEC Electronics Corporation
    Inventor: Hiroyuki Takahashi
  • Patent number: 7630026
    Abstract: A planar light source includes a large variable width of an irradiation angle of illumination light, a display device having a large variable width of an angle of field that uses the planar light source, a portable terminal device that uses the display device, and a ray direction switching element that is incorporated in the planar light source. A beam direction regulating element (a louver), which controls a direction of light, and a transparent and scattering switching element, which can switch the transparent state and the scattering state according to ON and OFF of an applied voltage, are provided between a backlight and a liquid crystal panel, whereby it is possible to increase a variable width of an irradiation angle of light in the planar light source and increase a variable width of an angle of field of the liquid crystal display device that uses the planar light source.
    Type: Grant
    Filed: January 28, 2008
    Date of Patent: December 8, 2009
    Assignee: NEC Corporation
    Inventors: Ken Sumiyoshi, Teruaki Suzuki, Fujio Okumura, Shinichi Uehara
  • Patent number: 7631285
    Abstract: In a support method of designing a semiconductor device, a plurality of wiring lines are arranged in parallel in a wiring line layer to transfer a same signal. A wiring line inhibition area is set in the wiring line layer to cover a space between the plurality of wiring lines and to inhibit arrangement of another wiring line other than the plurality of wiring lines.
    Type: Grant
    Filed: December 11, 2006
    Date of Patent: December 8, 2009
    Assignee: NEC Electronics Corporation
    Inventor: Hirotaka Ishikawa
  • Patent number: 7630990
    Abstract: According to one embodiment, an endmember spectrum extraction unit generates an input endmember spectrum group from a hyperspectral image. A collation unit outputs an endmember spectrum group including endmember spectra that are registered with neither a spectrum library nor an endmember spectrum database as a new endmember spectrum group. An input endmember spectrum distribution image generation unit generates an input endmember distribution image every input endmember spectrum. A new endmember spectrum distribution image selection unit selects an input endmember spectrum distribution image that is included in input endmember spectrum distribution images and that corresponds to new endmember spectrum as a new endmember distribution image.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: December 8, 2009
    Assignee: NEC Corporation
    Inventor: Hiromichi Hirata
  • Patent number: 7631226
    Abstract: The present invention provides a PCI bus controller to prevent system down caused by a PCI bus fault and to enable a PCI device driver to handle all PCI bus faults. A bus signal controlling portion controls a transaction with a PCI device on a PCI bus according to a PCI bus protocol, treats the PCI bus as in a degradation state by lighting up a bus fault indicator when a bus fault is detected, and accepts a request of instructing the PCI device. A configuration portion has the bus fault indicator, updates a configuration register, and sends a reply transaction to an inbound controller portion. An arbitration portion arbitrates for a PCI bus and masks a request of use a bus from PCI device when the bus is in a degradation state.
    Type: Grant
    Filed: January 13, 2005
    Date of Patent: December 8, 2009
    Assignee: NEC Corporation
    Inventor: Toshio Oohira
  • Patent number: 7629567
    Abstract: A light receiving circuit includes a first light receiving element converting an input light to an electric current to output the electric current, a current-voltage conversion circuit converting the electric current to an electric voltage to output the electric voltage, a first switch element connected between the first light receiving element and the current-voltage conversion circuit, and a first current supply element connected between a first voltage source and the first light receiving element and forming an electric current path from the first voltage source to the first light receiving element.
    Type: Grant
    Filed: January 9, 2008
    Date of Patent: December 8, 2009
    Assignee: NEC Electronics Corporation
    Inventor: Hitoshi Imai
  • Patent number: 7629210
    Abstract: To make electric current concentration and electric field concentration hardly take place in junction parts even in case of performing miniaturization and to achieve triggering at low voltage. An ESD protection apparatus is installed between an input terminal 6 of a semiconductor integrated circuit chip and a CMOS transistor 100 and includes a trigger element 310 comprising diodes 311, 312 which are broken down by overvoltage applied to the input terminal 6 and an ESD protection element 210 including longitudinal bipolar transistors 211, 212 for discharging the accumulated electric charge of the input terminal 6 by being electrically communicated owing to the breakdown of the diodes 311, 312.
    Type: Grant
    Filed: January 4, 2007
    Date of Patent: December 8, 2009
    Assignee: NEC Corporation
    Inventor: Mototsugu Okushima
  • Patent number: 7631186
    Abstract: A mobile terminal transmits an N-th authentication key to an authentication server when the mobile terminal has moved from a coverage area under a certain radio access point to a coverage area under another radio access point. The N-th authentication key is generated by applying a hash function to a random number a number of times one smaller than an (N?1)th authentication key which was transmitted when the mobile terminal moved to the coverage area under the certain radio access point. Upon receipt of the N-th authentication key from the mobile terminal, the authentication server applies the hash function once to the N-th authentication key, and compares the result with the (N?1)th authentication key. Then, the authentication server determines that the authentication is successful when there is a match between both keys.
    Type: Grant
    Filed: November 22, 2004
    Date of Patent: December 8, 2009
    Assignee: NEC Corporation
    Inventor: Toshiya Okabe
  • Patent number: 7630884
    Abstract: The object of this invention is converting a code that has been obtained by encoding speech by one particular system is converted to code that can be decoded by another system with high speech quality, and moreover, with a low computational load in transmitting speech signal between different systems. This invention comprising an adaptive codebook (ACB) delay search range control circuit (1250 in FIG. 7) for calculating a search range control value from first adaptive codebook delay that is stored and held and said second adaptive codebook delay that is stored and held, and an adaptive codebook encoding circuit (1220 in FIG.
    Type: Grant
    Filed: November 12, 2002
    Date of Patent: December 8, 2009
    Assignee: NEC Corporation
    Inventor: Atsushi Murashima
  • Patent number: 7629802
    Abstract: Provided is a semiconductor device including a determination circuit adapted to determine whether a fuse is in a connection or disconnection state. The semiconductor device includes a first and second power supply terminals, a measuring terminal, and at least one trimming detection circuit connected between the measuring terminal and one of the first and second power supply terminals. The trimming detection circuit is constructed by a current supplying element, a series arrangement of a fuse and a switch element, and the determination circuit. The current supplying element and series arrangement are connected in series between the measuring terminal and the one of the first and second power supply terminals. The determination circuit has an input connected to a node between the current supplying element and series arrangement. A voltage at the other of the first and second power supply terminals is applied to the measuring terminal in a normal mode.
    Type: Grant
    Filed: September 2, 2008
    Date of Patent: December 8, 2009
    Assignee: NEC Electronics Corporation
    Inventor: Kiyoshi Kanno
  • Publication number: 20090299996
    Abstract: Systems and methods are disclosed for generating a recommendation by performing collaborative filtering using an infinite dimensional matrix factorization; generating one or more recommendations using the collaborative filtering; and displaying the recommendations to a user.
    Type: Application
    Filed: December 9, 2008
    Publication date: December 3, 2009
    Applicant: NEC Laboratories America, Inc.
    Inventors: Kai Yu, Shenghuo Zhu, Yihong Gong
  • Publication number: 20090296958
    Abstract: It is possible to provide a noise suppression method, device, and program capable of realizing a sound image positioning of an output side corresponding to an input side with a small calculation amount. The device includes a common suppression coefficient calculation unit for receiving conversion outputs from a plurality of channels and calculating a suppression coefficient common to the channels.
    Type: Application
    Filed: June 29, 2007
    Publication date: December 3, 2009
    Applicant: NEC CORPORATION
    Inventor: Akihiko Sugiyama
  • Publication number: 20090295767
    Abstract: Disclosed is a digital-to-analog converter in which a plurality of reference voltages that differ from one another are grouped into first to (S+1)th reference voltage groups. The digital-to-analog converter has a decoder and an amplifying circuit. The decoder includes: first to (S+1)th subdecoders for selecting respective ones of reference voltages corresponding to a value of a first bit group on an upper bit side of an input digital signal from the reference voltages of the first to (S+1)th reference voltage groups; and an (S+1)-input and 2-output type subdecoder for selecting and outputting two reference voltages out of reference voltages selected by the first to (S+1)th subdecoders, in accordance with a value of a second bit group on a lower side of the input digital signal.
    Type: Application
    Filed: May 22, 2009
    Publication date: December 3, 2009
    Applicant: NEC ELECTRONICS CORPORTION
    Inventor: Hiroshi Tsuchi
  • Publication number: 20090300568
    Abstract: A design method of a bus interface that includes an I/F interposed between chips, includes determining a bus width of the bus interface between chips and a type of the bus interface, based on a physical constraint condition between the chips, and automatically generating a bus IP core that comprises a circuit configured in accordance with the determined bus width and the bus interface.
    Type: Application
    Filed: May 4, 2009
    Publication date: December 3, 2009
    Applicant: NEC Electronics Corporation
    Inventor: Yasuaki Kuroda