Patents Assigned to NES Co., Ltd
  • Patent number: 7898339
    Abstract: An amplifier circuit with favorable linearity is provided. An amplifier of the present invention is provided with an amplifier MOS transistor, a diode-connected transistor block for negative feedback source impedance constituted by series-parallel connection of the limited number (including 0) of the diode-connected MOS transistors and connected to a source side of the amplifier MOS transistor, and a diode-connected transistor block for load constituted by series-parallel connection of the limited number of the diode-connected MOS transistors and connected to a drain side of the amplifier MOS transistor. A voltage gain is configured to be determined by a ratio of the sum of source impedance of the amplifier MOS transistor and the impedance of the diode-connected transistor block for negative feedback source impedance to the impedance of the diode-connected transistor block for load.
    Type: Grant
    Filed: May 14, 2009
    Date of Patent: March 1, 2011
    Assignees: Kabushiki Kaisha Nihon Micronics, NES Co., Ltd
    Inventors: Masato Ikeda, Tokio Miyashita
  • Publication number: 20090295480
    Abstract: An amplifier circuit with favorable linearity is provided. An amplifier of the present invention is provided with an amplifier MOS transistor, a diode-connected transistor block for negative feedback source impedance constituted by series-parallel connection of the limited number (including 0) of the diode-connected MOS transistors and connected to a source side of the amplifier MOS transistor, and a diode-connected transistor block for load constituted by series-parallel connection of the limited number of the diode-connected MOS transistors and connected to a drain side of the amplifier MOS transistor. A voltage gain is configured to be determined by a ratio of the sum of source impedance of the amplifier MOS transistor and the impedance of the diode-connected transistor block for negative feedback source impedance to the impedance of the diode-connected transistor block for load.
    Type: Application
    Filed: May 14, 2009
    Publication date: December 3, 2009
    Applicants: KABUSHIKI KAISHA NIHON MICRONICS, NES CO., LTD.
    Inventors: Masato Ikeda, Tokio Miyashita