Abstract: An apparatus is provided with operating logic for performing a number of data compression operations, and control logic for dynamically selecting one or more of the data compression operations, and have the selected data compression operation(s) performed on a set of data, in accordance with a set of scaling policies. In one embodiment the scaling policies are based, at least in part, on processor type and thread backlog. The scaling policies are used to determine compression techniques and combinations to use with data being communicated.

Abstract: A server is provided with operating logic that dynamically migrates or shadows data it shares with its client, in accordance with a migration/shadowing policy that is based on one or more migration/shadowing heuristics. The server is also provided with operating logic that creates the shared data in accordance with a creation policy that is based on one or more creation heuristics. Furthermore, the server is provided with operating logic that maintains the migration/shadowing as well as the creation heuristics in accordance with an update policy. In one embodiment where the data are pixel maps, the migration/shadowing and creation heuristics are corresponding local usage counts, one per pixel map, and a global usage count respectively. The usage counts are incremented and decremented depending on the destinations of the pixel maps of interest.

Abstract: An improved method and apparatus for providing multimedia communication between and client device and a server. The improved method and apparatus allows for communication of information, such as audio or video information from an application program to be communicated through a standard application program interface to a device driver which, in turn communicates the information over a network to a server.

Abstract: An apparatus is provided with operating logic for performing a number of data compression operations, and control logic for dynamically selecting one or more of the data compression operations, and have the selected data compression operation(s) performed on a set of data, in accordance with a set of scaling policies. In one embodiment the scaling policies are based, at least in part, on processor type and thread backlog. The scaling policies are used to determine compression techniques and combinations to use with data being communicated.

Abstract: The present invention is a method and apparatus for executing three-operand raster operation in two-operand raster environments. Structurally, the present invention includes a lookup table having one entry for each three-operand raster operation which is to be emulated. The entry associated with a particular three-operand raster operation includes a template and zero or more two-operand raster operations. Execution of the three-operand raster operation begins by retrieving the lookup table entry associated with the three-operand raster operation. Each two-operand raster operation in the lookup table entry is then executed in sequence. During execution, the template is used to provide a mapping which chooses which operands of the three-operand raster operation will be used as operands for the two-operand raster operation in the sequence.

Abstract: A method for rendering of three dimensional images on a video subsystem which does not include clearing of the Z buffer at each frame includes establishment of a Z buffer and a sequence number in memory, where the sequence number is incremented with each successive frame rendered and the Z buffer is cleared when the sequence number reaches a predetermined value; the Z buffer is thus recycled a number of times between clears. In a more elaborate implementation, the precision of the Z buffer is adjusted to permit clearing of the Z buffer to occur either as the result of the sequence number reaching a predetermined value or as the result of the accrual of a predetermined amount of time allocated for clearing, referred to as scheduling. The scheduling method can be applied to a wide range of accounting tasks within a system.

Abstract: The present invention is a method and apparatus for executing three-operand raster operation in two-operand raster environments. Structurally, the present invention includes a lookup table having one entry for each three-operand raster operation which is to be emulated. The entry associated with a particular three-operand raster operation includes a template and zero or more two-operand raster operations. Execution of the three-operand raster operation begins by retrieving the lookup table entry associated with the three-operand raster operation. Each two-operand raster operation in the lookup table entry is then executed in sequence. During execution, the template is used to provide a mapping which chooses which operands of the three-operand raster operation will be used as operands for the two-operand raster operation in the sequence.

Abstract: A line-draw method and apparatus that draws lines at fast speeds. Lines are drawn a pixel at a time and a number of algorithms are employed to determine the pixels to be drawn. The line-draw method determined is a function of line length, typical length categories are short, medium and long. For short lines, a table look-up method is employed. For longer length lines, a multi-pixel segment method (burst method) is employed. Burst methods are line-draw methods which draw lines using a plurality of multi-pixel segments to draw the lines where each segment is characterized as having a number (U) of unconditional pixels which are always drawn and an actual number (A) of conditional pixels which are drawn. The actual number (A) is any number up to a maximum number (C) of conditional pixels which can be drawn.

Abstract: A method for rendering of three dimensional images on a video subsystem which does not include clearing of the Z buffer at each frame includes establishment of a Z buffer and a sequence number in memory, where the sequence number is incremented with each successive frame rendered and the Z buffer is cleared when the sequence number reaches a predetermined value; the Z buffer is thus recycled a number of times between clears. In a more elaborate implementation, the precision of the Z buffer is adjusted to permit clearing of the Z buffer to occur either as the result of the sequence number reaching a predetermined value or as the result of the accrual of a predetermined amount of time allocated for clearing, referred to as scheduling. The scheduling method can be applied to a wide range of accounting tasks within a system.

Abstract: An electronic data storage memory performs logic operations on the data values existing in its storage cells to eliminate the number of necessary memory accesses during bitblts. The time in which a bitblt can be completed in an image processing system is prolonged because of the number of memory cycles performed during a "raster operation". Thus, to reduce the number of necessary memory cycles, simple logic operations are performed in image processor memory so that a raster operation may take place without having to read, for example, the destination operand from memory. Since a bitblt performs a raster operation on each pixel in the bitblt block, the reduction in memory access time is proportional to the size of the bitblt block.

Abstract: The number of required clock periods in a bit aligned block transfer operation may be reduced by analyzing the logical relationship between source, destination and pattern operands prior to fetching these operands from memory. If the result of the raster operation can be determined without actually using the value of any of the operands, the result is provided without reading memory values. When the raster operation will have no effect on the existing destination operand, the write operation is also canceled.

Abstract: An electronic data storage memory performs logic operations on the data values existing in its storage cells to eliminate the number of necessary memory accesses during bitblts. The time in which a bitblt can be completed in an image processing system is prolonged because of the number of memory cycles performed during a "raster operation". Thus, to reduce the number of necessary memory cycles, simple logic operations are performed in image processor memory so that a raster operation may take place without having to read, for example, the destination operand from memory. Since a bitblt performs a raster operation on each pixel in the bitblt block, the reduction in memory access time is proportional to the size of the bitblt block.

Abstract: The number of required clock periods in a bit aligned block transfer operation may be reduced by analyzing the logical relationship between source, destination and pattern operands prior to fetching these operands from memory. If the result of the raster operation can be determined without actually using the value of any of the operands, the result is provided without reading memory values. When the raster operation will have no effect on the existing destination operand, the write operation is also canceled.