Abstract: A circuit and a method for eliminating a spurious signal are provided. The circuit includes a phase detector, a spurious estimation and regeneration device, and a phase shifter. After an actual clock signal containing a spurious signal is obtained, the contained spurious signal is estimated based on the reference clock signal that does not contain the spurious signal. Reverse adjustment is performed on the actual clock signal based on the estimated spurious signal to eliminate the spurious signal in the actual clock signal, ensuring eliminating the generated spurious signal by performing reverse adjustment, improving the signal transmission quality, thereby solving the problem of reduced signal quality due to that the spurious signal cannot be suppressed in generation according to the conventional technology.

Abstract: A system and a method for hitless clock switching are provided. In the system, a sampling circuitry group samples a primary reference clock signal and a secondary reference clock signal to obtain first and second sampling information, respectively. A phase detector group obtains a phase difference between the primary and secondary reference clock signals with the first and second sampling information. A compensator group adds the phase difference to a phase of the secondary reference clock signal to obtain a backup reference clock signal. When the primary reference clock signal is abnormal or missing, the signal selector determines the backup reference clock signal as a target reference clock signal and sends it to a phase-locked loop. The phase-locked loop performs loop control on the target reference clock signal, thereby implementing hitless switching of reference clock signals.

Abstract: A circuit and a method for automatically calibrating a phase interpolator are provided. Phase information of a reference clock signal and an output clock signal are processed by a phase detector to detect a phase difference of the two clock signals. A difference value between the phase difference and a standard phase difference corresponding to the digital control code is obtained, to generate compensation information. The compensation information is sent to the phase interpolator control unit for storage. When the phase interpolator operates normally, a phase interpolator control unit generates a control signal based on the compensation information, to regulate the phase value of the output clock signal of the phase interpolator.