Patents Assigned to Newisys, Inc. a Delaware corporation
  • Publication number: 20040268052
    Abstract: According to the present invention, methods and apparatus are provided for increasing the efficiency of data access in a multiple processor, multiple cluster system. Mechanisms for reducing the number of transactions in a multiple cluster system are provided. In one example, owning node information is used to limit the number of probes transmitted in a particular cluster.
    Type: Application
    Filed: June 27, 2003
    Publication date: December 30, 2004
    Applicant: Newisys, Inc., A Delaware corporation
    Inventor: David B. Glasco
  • Publication number: 20040260832
    Abstract: Improved techniques are provided for reducing latency in inter-cluster communications within computer systems having a plurality of multi-processor clusters. The local nodes of each cluster include a plurality of processors and an interconnection controller. Intra-cluster links are formed between the local nodes, including the interconnection controller, within a cluster. Inter-cluster links are formed between interconnection controllers of different clusters. Intra-cluster packets may be encapsulated as inter-cluster packets and stored in a transmission buffer pending transmission on an inter-cluster link. When the transmission buffer is empty, a control character is transmitted on an inter-cluster link. The control character is not stored in the transmission buffer or in a reception buffer, but instead is dropped. Clock data may be embedded in symbols sent on each bit lane of the inter-cluster links, including the symbol(s) of the control character.
    Type: Application
    Filed: June 23, 2003
    Publication date: December 23, 2004
    Applicant: Newisys, Inc., A Delaware corporation
    Inventors: Rajesh Kota, Shashank Nemawarkar, Guru Prasadh, Carl Zeitler, David B. Glasco
  • Publication number: 20040255002
    Abstract: According to the present invention, methods and apparatus are provided for increasing the efficiency and effectiveness of communications between multiprocessor clusters. Mechanisms for improving the accuracy of information available to an interconnection controller are implemented in order to allow the interconnection controller to increase reliability and reduce latency in a multiple cluster system. Protocol extensions and link layer extensions are provided with packets to convey information between interconnection controllers of separate multiprocessor clusters.
    Type: Application
    Filed: June 12, 2003
    Publication date: December 16, 2004
    Applicant: Newisys, Inc., A Delaware corporation
    Inventors: Rajesh Kota, Shashank Newawarker, Guru Prasadh, Carl Zeitler, David B. Glasco
  • Publication number: 20040236912
    Abstract: According to the present invention, methods and apparatus are provided for increasing the efficiency of data access in a multiple processor, multiple cluster system. Mechanisms for allowing a variety of transactions to complete locally are implemented by providing remote data caches associated with the various clusters in the system. The remote data caches receive data and state information for memory lines held in remote clusters. State information is provided to the remote data cache using various mechanisms including a coherence directory and augmented source done messages.
    Type: Application
    Filed: May 20, 2003
    Publication date: November 25, 2004
    Applicant: Newisys, Inc. A Delaware corporation
    Inventor: David Brian Glasco
  • Publication number: 20040153507
    Abstract: Methods and apparatus are provided for improving the distribution of system management signals within a computer system complex. Mechanisms are provided for transmission both within a box and between computer system boxes. Local routing tables and general routing tables allow the distribution of system management signals precisely to resources associated with particular partitions. Signals are sequenced to put resources associated with one or more boxes in the appropriate states. The distribution of signals between boxes in the computer system complex can be accomplished with the use of a dedicated wire.
    Type: Application
    Filed: January 30, 2003
    Publication date: August 5, 2004
    Applicant: Newisys, Inc. A Delaware corporation
    Inventors: Carl Zeitler, David Brian Glasco, Les Record, Richard R. Oehler, William G. Kulpa, Guru Prasadh, Rajesh Kota
  • Publication number: 20040117559
    Abstract: According to the present invention, methods and apparatus are provided for increasing the efficiency of data access in a multiple processor, multiple cluster system. Mechanisms for transmitting memory cancels to memory controllers in the various clusters of a multiple cluster system are provided. In one example, memory cancels are transmitted between clusters when it is determined that a memory line associated with a probe is dirty. The memory cancel directs the memory controller to no longer proceed with a data fetch from main memory. In another example, memory cancels are transmitted at a home cluster based on information in a coherence directory in order to more quickly end a data fetch.
    Type: Application
    Filed: December 16, 2002
    Publication date: June 17, 2004
    Applicant: Newisys, Inc. A Delaware corporation
    Inventors: David B. Glasco, Rajesh Kota
  • Publication number: 20040098475
    Abstract: Methods and apparatus are provided for improving the distribution of system management signals within a computer system complex. Mechanisms are provided for transmission both within a box and between computer system boxes. Local routing tables and general routing tables allow the distribution of system management signals precisely to resources associated with particular partitions. Signals are sequenced to put resources associated with one or more boxes in the appropriate states. The distribution of signals between boxes in the computer system complex can be accomplished without the use of a dedicated wire.
    Type: Application
    Filed: November 19, 2002
    Publication date: May 20, 2004
    Applicant: Newisys, Inc., A Delaware Corporation
    Inventors: Carl Zeitler, David Brian Glasco, Les Record, Richard R. Oehler, William G. Kulpa, Guru Prasadh, Rajesh Kota
  • Publication number: 20040093469
    Abstract: Methods and devices are provided for controlling lock and unlock operations within a computer system. A home cluster includes a home lock manager. The home lock manager is a master lock manager for the home cluster and for a plurality of remote clusters, the plurality of remote clusters including remote cache coherency controllers and a plurality of remote processors. Lock and unlock commands from the home lock manager are transmitted by a home cache coherency controller to the remote cache coherency controllers and forwarded to the remote processors.
    Type: Application
    Filed: November 8, 2002
    Publication date: May 13, 2004
    Applicant: Newisys, Inc. A Delaware corporation
    Inventor: David B. Glasco
  • Publication number: 20040088492
    Abstract: According to the present invention, methods and apparatus are provided for increasing the efficiency of data access in a multiple processor, multiple cluster system. Mechanisms for reducing the number of transactions in a multiple cluster system are provided. In one example, probe filter information is used to limit the number of probe requests transmitted to request and remote clusters.
    Type: Application
    Filed: November 4, 2002
    Publication date: May 6, 2004
    Applicant: Newisys, Inc. a Delaware Corporation
    Inventor: David B. Glasco
  • Publication number: 20040088496
    Abstract: Cache coherence directory eviction mechanisms are described for use in computer systems having a plurality of multiprocessor clusters. Interaction among the clusters is facilitated by a cache coherence controller in each cluster. A cache coherence directory is associated with each cache coherence controller identifying memory lines associated with the local cluster which are cached in remote clusters. A variety of techniques for managing eviction of entries in the cache coherence directory are provided.
    Type: Application
    Filed: November 5, 2002
    Publication date: May 6, 2004
    Applicant: Newisys, Inc. A Delaware corporation
    Inventors: David Brian Glasco, Rajesh Kota, Sridhar K. Valluru
  • Publication number: 20040088495
    Abstract: Cache coherence directory eviction mechanisms are described for use in computer systems having a plurality of multiprocessor clusters. Interaction among the clusters is facilitated by a cache coherence controller in each cluster. A cache coherence directory is associated with each cache coherence controller identifying memory lines associated with the local cluster which are cached in remote clusters. A variety of techniques for managing eviction of entries in the cache coherence directory are provided.
    Type: Application
    Filed: November 5, 2002
    Publication date: May 6, 2004
    Applicant: Newisys, Inc., A Delaware corporation
    Inventors: David B. Glasco, Rajesh Kota, Sridhar K. Valluru
  • Publication number: 20030233388
    Abstract: A multi-processor computer system is described in which address mapping, routing, and transaction identification mechanisms are provided which enable the interconnection of a plurality of multi-processor clusters, wherein the number of processors interconnected exceeds limited address, node identification, and transaction tag spaces associated with each of the individual clusters.
    Type: Application
    Filed: May 28, 2002
    Publication date: December 18, 2003
    Applicant: NEWISYS, Inc. A Delaware corporation
    Inventors: David Brian Glasco, Carl Zeitler, Rajesh Kota, Guru Prasadh, Richard R. Oehler
  • Publication number: 20030225938
    Abstract: A multi-processor computer system is described in which address mapping, routing, and transaction identification mechanisms are provided which enable the interconnection of a plurality of multi-processor clusters, wherein the number of processors interconnected exceeds limited address, node identification, and transaction tag spaces associated with each of the individual clusters.
    Type: Application
    Filed: May 28, 2002
    Publication date: December 4, 2003
    Applicant: Newisys, Inc., A Delaware corporation
    Inventors: David Brian Glasco, Carl Zeitler, Rajesh Kota, Guru Prasadh, Richard R. Oehler
  • Publication number: 20030225978
    Abstract: According to the present invention, methods and apparatus are provided for increasing the efficiency of data access in a multiple processor, multiple cluster system. Techniques are provided for speculatively probing a remote cluster from either a request cluster or a home cluster. A speculative probe associated with a particular memory line is transmitted to the remote cluster before the cache access request associated with the memory line is serialized at a home cluster. When a non-speculative probe is received at a remote cluster, the information associated with the response to the speculative probe is used to provide a response to the non-speculative probe.
    Type: Application
    Filed: May 28, 2002
    Publication date: December 4, 2003
    Applicant: NEWISYS, Inc.; A Delaware corporation
    Inventor: David B. Glasco
  • Publication number: 20030210655
    Abstract: According to the present invention, methods and apparatus are provided for increasing the efficiency of data access in a multiple processor, multiple cluster system. A home cluster of processors receives a cache access request from a request cluster. The home cluster includes mechanisms for instructing probed remote clusters to respond to the request cluster instead of to the home cluster. The home cluster can also include mechanisms for reducing the number of probes sent to remote clusters. Techniques are also included for providing the requesting cluster with information to determine the number of responses to be transmitted to the requesting cluster as a result of the reduction in the number of probes sent at the home cluster.
    Type: Application
    Filed: May 13, 2002
    Publication date: November 13, 2003
    Applicant: Newisys, Inc. A Delaware corporation
    Inventor: David B. Glasco
  • Publication number: 20030212741
    Abstract: According to the present invention, methods and apparatus are provided for increasing the efficiency of data access in a multiple processor, multiple cluster system. A home cluster of processors receives a cache access request from a request cluster. The home cluster includes mechanisms for instructing probed remote clusters to respond to the request cluster instead of to the home cluster. The home cluster can also include mechanisms for reducing the number of probes sent to remote clusters. Techniques are also included for providing the requesting cluster with information to determine the number of responses to be transmitted to the requesting cluster as a result of the reduction in the number of probes sent at the home cluster.
    Type: Application
    Filed: May 13, 2002
    Publication date: November 13, 2003
    Applicant: Newisys, Inc., A Delaware corporation
    Inventor: David B. Glasco
  • Publication number: 20030182508
    Abstract: According to the present invention, methods and apparatus are provided for increasing the efficiency of data access in multiple processor, multiple cluster systems. A cache coherence controller associated with a first cluster of processors can determine whether speculative probing can be performed before forwarding a data access request to a second cluster. The cache coherence controller can also forward the data access request to the second cluster before receiving a probe response.
    Type: Application
    Filed: March 22, 2002
    Publication date: September 25, 2003
    Applicant: Newisys, Inc. a Delaware corporation
    Inventor: David B. Glasco