Abstract: A power module and a power device are provided. The power device includes two screws, a heat dissipation components and a power module. The power module includes a substrate, a package body and two fixing structures. Each fixing structure includes a first through hole, two second through holes, an annular structure and two sinking structures. When the power module is fixed to the heat dissipation component, each sinking structure is bent toward the heat dissipation component, and each annular structure is fixed to the flat surface of the heat dissipation component by the screws. The heat dissipation surface of the substrate can be flatly attached to the flat surface of the heat dissipation component through the two fixed structures, so that the heat energy generated during the operation of the power module can be transferred out through the heat dissipation component.

Abstract: A power module including a carrier assembly and a power device disposed on the carrier assembly is provided. The carrier assembly includes a bottom board, a circuit board, a lead frame, and a pad group. The circuit board is disposed on the bottom board and includes a device mounting portion and an extending portion protruding from a side of the device mounting portion. The lead frame disposed on the bottom board includes a first conductive portion and a second conductive portion insulated from each other. The extending portion of the circuit board is disposed between the first and second conductive portions, and an upper surface of the lead frame is flush with a top surface of the extending portion. A pad group includes a first pad disposed on the extending portion, a second pad and a third pad respectively disposed on the first and second conductive portions.

Abstract: A brake energy recovery module for an electric vehicle. The electric vehicle includes a motor module and a battery module. The brake energy recovery module includes a first detecting unit, a signal decoder, a power converting unit and a control unit. The first detecting unit is electrically connected to the motor module to detect a first voltage of the motor module. The signal decoder generates a first signal and a second signal according to plural operation signals of the motor module. The power converting unit is electrically connected to the motor module and the battery module. The control unit is electrically connected to the first detecting unit, the signal decoder and the power converting unit. The control unit controls the power converting unit to adjust the first voltage to provide the battery module with a second voltage according to the first voltage, the first signal and the second signal.

Abstract: A manufacturing method of a chip package structure is provided. Firstly, a conductive frame including a bottom plate and a plurality of partition plates is provided. The bottom plate has a supporting surface and a bottom surface opposite thereto, and the partition plates protrude from the supporting surface to define a plurality of the accommodating regions. Subsequently, a plurality of chips is provided, and each of the chips is correspondingly accommodated in each of the accommodating regions with a back surface facing to the supporting surface. Thereafter, the conductive frame is cut to form a plurality of separated chip package structures.

Abstract: A one-way conduction device includes a first transistor and a driving circuit. The driving circuit includes a first circuit, a second circuit and a detection circuit. The first transistor is coupled between an input end and an output end of the one-way conduction device. In the first circuit, a first conduction unit is coupled between the input end of the one-way conduction device and a first resistor. In the second circuit, a second conduction unit is coupled between the output end of the one-way conduction device and a second resistor. In the driving circuit, the detection circuit detects whether a current flows from the first circuit to the second circuit, and accordingly turns on or turns off the first transistor. In this manner, the driving circuit can control the turning on and off of the one-way conduction device.

Abstract: A fan-out wafer level chip package structure and the manufacturing method thereof are provided. The method includes the steps of providing a supporting plate having a removable tape formed on the supporting plate, placing a plurality of chips on the removable tape, applying an adhesive layer on a back surface of each of the chips, providing a conductive cover for covering all chips and isolating the chips from each other by a plurality of partitions, injecting a molding compound into an inside of the conductive cover and curing the molding compound for forming an encapsulation, separating the encapsulation from the supporting plate, forming a connection layer on an active surface of each of the chips to establish electrical connections, and performing a cutting process to divide the encapsulation into a plurality of the package structures.

Abstract: A semiconductor package structure and manufacturing method thereof are provided. Firstly, a first surface mounting unit, a first printed circuit board, and a second printed circuit board are provided. The first surface mounting unit includes a first chip and a first conductive frame, and the first conductive frame has a first carrier board and a first metal member connected to the first carrier board. A first side of the first chip is electrically connected to the first carrier board of the first conductive frame. A second side of the first chip and the first metal member are connected to the first circuit board by a first pad and a second pad respectively. The second circuit board is connected to the first carrier board and hence, the first surface mounting unit is located between the first circuit board and the second circuit board.

Abstract: A semiconductor package structure and manufacturing method thereof are provided. Firstly, a first surface mounting unit, a first printed circuit board, and a second printed circuit board are provided. The first surface mounting unit includes a first chip and a first conductive frame, and the first conductive frame has a first carrier board and a first metal member connected to the first carrier board. A first side of the first chip is electrically connected to the first carrier board of the first conductive frame. A second side of the first chip and the first metal member are connected to the first circuit board by a first pad and a second pad respectively. The second circuit board is connected to the first carrier board and hence, the first surface mounting unit is located between the first circuit board and the second circuit board.

Abstract: A chip package structure and the manufacturing method thereof are provided. Firstly, a conductive frame including a bottom plate and a plurality of partition plates is provided. The bottom plate has a supporting surface and a bottom surface opposite thereto, and the partition plates protrude from the supporting surface to define a plurality of the accommodating regions. Subsequently, a plurality of chips is provided, and each of the chips is correspondingly accommodated in each of the accommodating regions with a back surface facing to the supporting surface. Thereafter, the conductive frame is cut to form a plurality of separated chip package structures.

Abstract: A manufacturing method of ultra-thin semiconductor device package structure is provided. Firstly, a wafer including a plurality of semiconductor devices is provided, and one of the semiconductor devices has an active surface having an active region and an outer region and a back surface. A first electrode and a second electrode are arranged in the active region, and the outer region has a cutting portion and a channel portion. Subsequently, a trench is formed in the channel portion, and filled with a conductive structure. The wafer is fixed on a supporting board, and then a thinning process and a deposition process of a back electrode layer are performed on the back surface in sequence. Thereafter, the supporting board is removed and a plurality of contacting pads is formed. A cutting process is performed along the cutting portion.

Abstract: A fan-out wafer level chip package structure and the manufacturing method thereof are provided. The method includes the steps of providing a supporting plate having a removable tape formed on the supporting plate, placing a plurality of chips on the removable tape, applying an adhesive layer on a back surface of each of the chips, providing a conductive cover for covering all chips and isolating the chips from each other by a plurality of partitions, injecting a molding compound into an inside of the conductive cover and curing the molding compound for forming an encapsulation, separating the encapsulation from the supporting plate, forming a connection layer on an active surface of each of the chips to establish electrical connections, and performing a cutting process to divide the encapsulation into a plurality of the package structures.

Abstract: A power conversion apparatus is provided. The power conversion apparatus receives an AC input power by an input side and includes a capacitor, an AC-to-DC conversion unit and a discharge unit. The capacitor is connected with the input side. The AC-to-DC conversion unit is coupled to the input side, and configured to convert the AC input power after receiving the AC input power to generate a DC output power. The discharge unit is coupled to the capacitor and has at least two switch elements. The discharge unit enables the at least two switch elements when supply of the AC input power is interrupted, such that one of a first discharge path and a second discharge path formed by the at least two switch elements is taken to discharge or drain the energy stored in the capacitor.

Abstract: A manufacturing method of wafer level chip scale package structure is provided. Firstly, a wafer including a plurality of semiconductor devices is provided. An active surface of one of the semiconductor devices has an active an active region and an outer region. A first electrode and a second electrode are arranged on the active region, and the outer region has a cutting portion and a channel portion. Next, a patterned protecting layer having a plurality of openings is formed on the active surface to respectively expose the first and second electrodes and channel portion. Subsequently, a wafer back thinning process is performed and then a back electrode layer is deposited. Subsequently, the channel portion is etched to form a trench exposing the back electrode layer, and a conductive structure connected to the back electrode layer is formed through the trench. Thereafter, the wafer is cut along the cutting portion.

Abstract: A package structure and a packaging method of wafer level chip scale package are provided. The packaging method includes: providing a carrier, and disposing a plurality of chips on the carrier; forming a plurality of adhesive layers on a surface of the corresponding chips; covering a conductive cover plate, bonding the conductive cover plate with the chips through the adhesive layers, and dividing out a plurality of packaging spaces by the conductive cover plate for disposing the chips respectively; and providing an insulation material to fill the packaging spaces through via holes on the conductive cover plate to form a first insulation structure; finally, removing the carrier.

Abstract: A package structure and a packaging method of wafer level chip scale package are provided. The packaging method includes: providing a carrier, and disposing a plurality of chips on the carrier; forming a plurality of adhesive layers on a surface of the corresponding chips; covering a conductive cover plate, bonding the conductive cover plate with the chips through the adhesive layers, and dividing out a plurality of packaging spaces by the conductive cover plate for disposing the chips respectively; and providing an insulation material to fill the packaging spaces through via holes on the conductive cover plate to form a first insulation structure; finally, removing the carrier.

Abstract: A low power consumption bleeder circuit is disclosed, and it is coupled to an alternating-current (AC) power source, an input filtering capacitor, and a rectifying filter. The low power consumption bleeder circuit includes a first switch component, a second switch component, and a controller. The first switch component is coupled to a first input terminal of the AC power source and a first connection terminal of the rectifying filter. The second switch component is coupled to a second input terminal of the AC power source and the first connection terminal of the rectifying filter. When the AC power source is detected to be removed, the controller controls at least one of the first switch component and the second switch component to be conductive.

Abstract: A conversion control circuit for controlling the operation of a power transistor is disclosed. The conversion control circuit includes a voltage-regulating switch and a control unit. One end of the voltage-regulating switch connects to an external voltage input terminal while another end connects to a voltage-regulating capacitor. The conversion control circuit converts an input voltage inputted from the external voltage input terminal into a power voltage. The power voltage is for supplying operating power to the conversion control circuit. The control unit receives a feedback voltage signal to generate a voltage-regulating pulse signal and a turn-on pulse signal, which are used for controlling the operations of the voltage-regulating switch and the power transistor, respectively and for defining a charging period for charging the voltage-regulating capacitor. A converter including the described conversion control circuit is also disclosed.

Abstract: A power conversion apparatus is provided. The power conversion apparatus receives an AC input power by an input side and includes a capacitor, an AC-to-DC conversion unit and a discharge unit. The capacitor is connected with the input side. The AC-to-DC conversion unit is coupled to the input side, and configured to convert the AC input power after receiving the AC input power to generate a DC output power. The discharge unit is coupled to the capacitor and has at least two switch elements. The discharge unit enables the at least two switch elements when supply of the AC input power is interrupted, such that one of a first discharge path and a second discharge path formed by the at least two switch elements is taken to discharge or drain the energy stored in the capacitor.

Abstract: A LED current-balance driving circuit having a current-balance coil set, a switching unit, and a control circuit is provided. The current-balance coil set has at least a first coil and a second coil, both of which are in connection with respective LED strings, for balancing currents flowing through the LED strings. The switching unit and a leakage inductance of current-balance coil set are utilized to facilitate the voltage conversion for driving the LED strings. A duty cycle of the switching unit is controlled by the control circuit according to the currents flowing through the LED strings.

Abstract: A low power consumption bleeder circuit is disclosed, and it is coupled to an alternating-current (AC) power source, an input filtering capacitor, and a rectifying filter. The low power consumption bleeder circuit includes a first switch component, a second switch component, and a controller. The first switch component is coupled to a first input terminal of the AC power source and a first connection terminal of the rectifying filter. The second switch component is coupled to a second input terminal of the AC power source and the first connection terminal of the rectifying filter. When the AC power source is detected to be removed, the controller controls at least one of the first switch component and the second switch component to be conductive.