Abstract: The present disclosure provides a film bulk acoustic resonator and its fabrication method. The fabrication method includes providing a first substrate, and sequentially forming a first electrode layer, a piezoelectric material layer, and a second electrode layer, on the first substrate; forming a support layer on the second electrode layer and forming a cavity with a top opening in the support layer, where the cavity passes through the support layer; providing a second substrate and bonding the second substrate with the support layer; removing the first substrate; and patterning the first electrode layer, the piezoelectric material layer, and the second electrode layer to form a first electrode, a piezoelectric layer, and a second electrode.

Abstract: The present disclosure provides a film bulk acoustic resonator and its fabrication method. The film bulk acoustic resonator includes a first substrate, a support layer bonded on the first substrate, a first cavity formed in the support layer, a piezoelectric stacked layer on the support layer, a first trench and a second trench which are formed in the piezoelectric stacked layer, a dielectric layer over the piezoelectric stacked layer, a second cavity formed in the dielectric layer, and a second substrate covering the second cavity, where the first trench is connected to the first cavity, and the second trench is connected to the second cavity.

Abstract: Fingerprint identification modules, methods for forming the fingerprint identification modules and electronic devices are provided. The method may include providing a substrate, containing a signal process circuit formed therein; providing a carrier substrate; forming one or more piezoelectric transducers on the carrier substrate, wherein a piezoelectric transducer of the one or more piezoelectric transducers includes a first electrode, a piezoelectric layer on the first electrode and a second electrode on the piezoelectric layer; forming a permanent bonding layer, containing one or more cavities, on one of the carrier substrate and the substrate; bonding the carrier substrate with the substrate using the permanent bonding layer, wherein the permanent bonding layer is between the one or more piezoelectric transducers and the substrate, and each piezoelectric transducer covers one cavity; and removing the carrier substrate.

Abstract: A packaging method and a packaging structure of a film bulk acoustic resonator are provided. The packaging method includes: providing a resonant cavity main structure including a first substrate and a film bulk acoustic resonant structure having a first cavity formed therebetween; forming a resonator cover by providing a second substrate and forming an elastic bonding material layer containing a second cavity; bonding the resonant cavity main structure and the resonator cover together through the elastic bonding material layer and removing elasticity of the elastic bonding material layer, where the second cavity is at least partially aligned with the first cavity; forming a through-hole penetrating through the resonator cover and exposing a corresponding electrical connection part of the film bulk acoustic resonant structure; and forming a conductive interconnection layer on a sidewall of the through-hole and on a portion of a surface of the resonator cover.

Abstract: The present disclosure provides a film bulk acoustic resonator and its fabrication method. The film bulk acoustic resonator includes a first substrate, a first support layer containing a first cavity, a piezoelectric stacked layer, and a first separation structure and/or a second separation structure. The piezoelectric stacked layer includes an effective working region and a parasitic working region; and in the parasitic working region, a first electrode and a second electrode have a corresponding region along a thickness direction. The first separation structure separates the first electrode, and the first electrode of a portion of the parasitic working region is insulated from the first electrode of the effective working region; and the second separation structure separates the second electrode, and the second electrode of a portion of the parasitic working region is insulated from the second electrode of the effective working region.

Abstract: Method for fabricating a photodetector includes providing a first substrate containing pixel circuits and common electrode connection members formed therein. A first wiring board material layer is formed on the first substrate and electrically connected to the pixel circuits. A second wiring board material layer is formed on a second substrate and electrically connected to the pixel layers formed therein. The first and second wiring board material layers are bonded. The second substrate, and the second and first wiring board material layers are etched to form through holes with isolation wall members formed therein, the through holes dividing the pixel layer, and the second and first wiring board material layers into pixel units, and second and first wiring boards. Each isolation wall member includes a conductive member and a sidewall between the conductive member and the pixel unit. A transparent electrode layer is formed on the second substrate.

Abstract: The present disclosure provides a package structure of an air gap type semiconductor device and its fabrication method. The fabrication method includes forming a bonding layer having a first opening on a carrier; disposing a semiconductor chip on the bonding layer, thereby forming a first cavity at the first opening, where the first cavity is at least aligned with a portion of an active region of the semiconductor chip; performing an encapsulation process to encapsulate the semiconductor chip on the carrier; lastly, forming through holes passing through the carrier where each through hole is aligned with a corresponding input/output electrode region of the semiconductor chip, and forming interconnection structures on a side of the carrier different from a side with the bonding layer, where each interconnection structure passes through a corresponding through hole and is electrically connected to an corresponding input/output electrode.

Abstract: A micro-electro-mechanical system (MEMS) package structure and a method for fabricating the MEMS package structure. The MEMS package structure includes a MEMS die (200) and a device wafer (100). A control unit and an interconnection structure (300) are formed in the device wafer (100), and a first contact pad (410) and an input-output connecting member (420) are formed on a first bonding surface (100a) of the device wafer (100). The MEMS die (200) is coupled to the first bonding surface (100a) through a bonding layer (500). The MEMS die (200) includes a closed micro-cavity (220) and a second contact pad (220). The first contact pad (410) is electrically connected to a corresponding second contact pad (220). An opening (510) that exposes the input-output connecting member (420) is formed in the bonding layer (500).

Abstract: Film bulk acoustic resonator (FBAR) is provided. An exemplary FBAR includes a substrate; a first insulating material layer on the substrate, the first insulating material layer containing a first cavity; a second insulating material layer on the first insulating material layer, the second insulating material layer containing a second cavity and a third cavity spaced apart from the second cavity, the second cavity and the third cavity both in communication with the first cavity; a resonator sheet covering the second cavity and partially extending over the second insulating material layer; a third insulating material layer over the second insulating material layer and the resonator sheet, the third insulating material layer containing a fourth cavity, the fourth cavity in communication with the third cavity, and the fourth cavity partially overlapping the second cavity; and a capping layer on the third insulating material layer.

Abstract: A thin-film bulk acoustic resonator (FBAR) apparatus includes a lower dielectric layer including a first cavity; an upper dielectric layer including a second cavity, wherein the upper dielectric layer is on the lower dielectric layer; and an acoustic resonance film that is positioned between and separating the first and the second cavities. The acoustic resonance film includes a lower electrode layer, an upper electrode layer, and a piezoelectric film that is sandwiched between the lower and upper electrode layers. A plan view of the first and the second cavities overlap to form an overlapped region having a polygonal shape without parallel sides.

Abstract: A thin-film bulk acoustic resonator, a semiconductor apparatus including the acoustic resonator and its manufacturing method are presented. The thin-film bulk acoustic resonator includes a lower dielectric layer, a first cavity inside the lower dielectric layer, an upper dielectric layer, a second cavity inside the upper dielectric layer, and a piezoelectric film that is located between the first and second cavities and continuously separates these two cavities. The plan views of the first and the second cavities have an overlapped region, which is a polygon that does not have any parallel sides. The piezoelectric film of this inventive concept is a continuous film without any through-hole in it, therefore it can offer improved acoustic resonance performance.

Abstract: Methods for forming a film bulk acoustic resonator (FBAR) are provided. In the method, formation of several mutually overlapped and hence connected sacrificial material layers above and under a resonator sheet facilitates the removal of the sacrificial material layers. Cavities left after the removal overlap at a polygonal area with non-parallel sides. This reduces the likelihood of boundary reflections of transverse parasitic waves causing standing wave resonance in the FBAR, thereby enhancing its performance in parasitic wave crosstalk. Further, according to the disclosure, the FBAR is enabled to be integrated with CMOS circuitry and hence exhibits higher reliability.

Abstract: Wafer-level packaging structure is provided. First chips are bonded to the device wafer. A first encapsulation layer is formed on the device wafer, covering the first chips. The first chip includes: a chip front surface with a formed first pad, facing the device wafer; and a chip back surface opposite to the chip front surface. A first opening is formed in the first encapsulation layer to expose at least one first chip having an exposed chip back surface for receiving a loading signal. A metal layer structure is formed covering the at least one first chip, a bottom and sidewalls of the first opening, and the first encapsulation layer, followed by an alloying treatment on the chip back surface and the metal layer structure to form a back metal layer on the chip back surface.

Abstract: A wafer-level package structure is provided, including a device wafer integrated with a first chip. The device wafer includes a first front surface integrated with the first chip and a first back surface opposite to the first front surface. A first oxide layer is formed on the first front surface. A second chip is provided to include a bonding surface, on which a second oxide layer is formed. A carrier substrate is provided to be temporarily bonded with the surface of the second chip that faces away from the bonding surface. The second chip is bonded with the device wafer through bonding the first and the second oxide layers using a fusion bonding process. The second chip and the carrier substrate are debonded. An encapsulation layer is formed on the first oxide layer and covers the second chip.

Abstract: The present disclosure provides a mask plate and fabrication method thereof. The mask plate includes a substrate, having a first surface and a second surface, and containing a plurality of openings. The mask plate also includes a mask pattern layer, formed on the first surface of the substrate and including a plurality of pattern regions and a shield region surrounding the plurality of pattern regions. Each pattern region includes at least one through hole, and each opening formed in the substrate exposes a pattern region and the at least one through hole in the pattern region. The mask plate further includes a top substrate layer, formed on the mask pattern layer. The top substrate layer contains a plurality of grooves passing through the top substrate layer, and each groove exposes a pattern region in the mask pattern layer and exposes the at least one through hole in the pattern region.

Abstract: An image capturing assembly includes an encapsulation layer, embedded with functional components. The top surface and bottom surface of the encapsulation layer expose the functional components. A through hole is formed in the encapsulation layer; and the functional components have soldering pads facing away from a bottom of the encapsulation layer. A photosensitive unit including a photosensitive chip and an optical filter is mounted on the photosensitive chip. The photosensitive chip is embedded in the through hole; the optical filter is outside the through hole; the top surface and bottom surface of the encapsulation layer expose the photosensitive chip; and the photosensitive chip includes soldering pads facing away from the bottom of the encapsulation layer. A redistribution layer structure is on the top side of the encapsulation layer and electrically connects the soldering pads of the photosensitive chip with the soldering pads of the functional components.

Abstract: Interconnect structures are provided. An interconnect structure includes a substrate; a first dielectric layer on the substrate and including an opening for a first interconnect layer extending to the substrate; a first metal layer having a first portion in the opening and a second portion in contact with the first portion and on a portion of the first dielectric layer adjacent to the opening; a second dielectric layer on the first dielectric layer and on the first metal layer, the second dielectric layer including a trench for a second interconnect layer, the trench exposing the second portion of the first metal layer; and a second metal layer in the trench, wherein the second portion of the first metal layer forms a lower portion of the second interconnect layer.

Abstract: A wafer-level system-in-package (WLSiP) package structure is provided. The WLSiP package structure includes a device wafer, an adhesive layer, and a plurality of second chips. The device wafer includes a first front surface having a plurality of first chips integrated therein and a first back surface opposing the first front surface. The adhesive layer is formed on the first front surface of the device wafer and the adhesive layer includes a plurality of through-holes exposing the first front surface. The plurality of second chips are bonded to the device wafer, and the plurality of second chips are bonded with the adhesive layer to cover the plurality of first through-holes in a one-to-one correspondence.

Abstract: The present disclosure provides an image capturing assembly and its packaging method, a lens module and an electronic device. The packaging method includes: providing a photosensitive chip; mounting an optical filter on the photosensitive chip; providing a carrier substrate and temporarily bonding the photosensitive chip and functional components on the carrier substrate; and forming an encapsulation layer on the carrier substrate and at least between the photosensitive chip and the functional components.

Abstract: A method for manufacturing an imaging module, including: providing a first substrate and bonding a first dielectric layer on the first substrate; patterning the first dielectric layer to form at least one first bump and at least one second bump which are mutually independent, wherein a region surrounded by the at least one second bump defines a location region of the moved element; providing a piezoelectric element, adhering one end of the piezoelectric element to the first bump through a first adhesion material and making the other end of the piezoelectric element at least partially located above the second bump; adhering the moved element to the second bump through a second adhesion material; and debonding to remove the first substrate.