Patents Assigned to Nippon Electronics Memory Industry Co. Ltd.
  • Patent number: 4163906
    Abstract: A time division switching regulator wherein a single power source is connected to a plurality of inverters the outputs from which are rectified and smoothed and appear at respective output terminals, and the output voltages at said terminals are sequentially monitored and are compared with a reference voltage to generate an error signal in response to which the output from the corresponding inverter may be controlled or regulated.
    Type: Grant
    Filed: August 24, 1977
    Date of Patent: August 7, 1979
    Assignee: Nippon Electronics Memory Industry Co., Ltd.
    Inventor: Hironori Shimamura
  • Patent number: 4025877
    Abstract: A multi-stage astable multivibrator wherein a plurality of astable multivibrators each consisting of two transistors are connected in parallel so that a high output may be derived and a completely rectangular output waveform may be obtained. Diodes are connected to the emitters of the transistors so that the breakdown of the transistors may be prevented.
    Type: Grant
    Filed: July 8, 1975
    Date of Patent: May 24, 1977
    Assignee: Nippon Electronics Memory Industry Co., Ltd.
    Inventors: Hirohito Hara, Hironori Shimamura
  • Patent number: 4017787
    Abstract: The invention discloses a switching regulator for use in a power supply system for an electric computer. The input from a DC or AC power supply is converted into the high frequency pulses, stepped up or down in voltage and rectified into the DC output to be supplied to a load. The power to be supplied to the load may be varied by changing the pulse duration of the high frequency pulses in response to the difference voltage representing the difference between the voltage across the load and the reference voltage. At starting, the internal circuits are biased with the power supplied from the power supply, but during the operation they are biased with said DC output or the output from the preceeding circuits.
    Type: Grant
    Filed: July 9, 1975
    Date of Patent: April 12, 1977
    Assignee: Nippon Electronics Memory Industry Co. Ltd.
    Inventors: Hirohito Hara, Hironori Shimamura