Patents Assigned to Nippon Telegraph and Telephone Public Corporation
  • Patent number: 4251783
    Abstract: A variable resistance device in the form of a PIN diode is connected between one of a pair of input terminals and one of a pair of output terminals, and the other input and output terminals are connected to a common terminal.A distributed constant line is connected between the output terminal of the PIN diode and the common terminal, and variable capacitance diodes are connected between the opposite ends of the distributed constant line and the common terminal. By applying a control voltage applied to the PIN diode and the variable capacitance diodes, the steepness and the center frequency of the variable resistance device are varied.
    Type: Grant
    Filed: April 4, 1979
    Date of Patent: February 17, 1981
    Assignees: Nippon Electric Co., Ltd., Nippon Telegraph and Telephone Public Corporation
    Inventors: Takahiko Yamada, Kozo Morita
  • Patent number: 4246594
    Abstract: The switching matrix with a plurality of individual lateral type PNPN type switching elements is disposed on a one chip silicon. The chip includes a double layered substrate having a thin P type layer with low impurity concentration epitaxial-grown on a P.sup.+ type layer with high impurity concentration and an N type layer with low impurity concentration epitaxially grown on the P type layer. The substrate has a low resistance. An N.sup.+ type buried layer with high impurity concentration is diffused into the junction between the P type layer and the N type layer at the location where the switching element is to be disposed. The switching element is formed in the N type layer right above the N.sup.+ type buried layer. P.sup.+ type isolation region with high impurity concentration is diffused into the N type layer, not contacting the N.sup.+ type buried layer but the substrate P type layer and enclosing the N type gate region of the switching element. At this time, between adjacent P.sup.
    Type: Grant
    Filed: March 6, 1978
    Date of Patent: January 20, 1981
    Assignee: Nippon Telegraph and Telephone Public Corporation
    Inventor: Masamichi Mori
  • Patent number: 4245325
    Abstract: Disclosed is a digital multifrequency signaling receiving system in which a first operation device executes an operation to multiply multifrequency signals composed of N samples as input signals by a window function including coefficients required for fast Fourier transform. An output produced at the first operation device, as a sample signal, is subjected to fast Fourier transformation at a second operation device which includes a subtractor and a logic circuit. In the subtractor, the sample signals are delayed N/2 samples to halve the number of sample signals. The logic circuit executes an operation for the sample signals, taking advantage of the fact that some frequencies of the outputs of the Fourier transform are represented as the conjugate complex of the other outputs of the Fourier transform.
    Type: Grant
    Filed: February 15, 1979
    Date of Patent: January 13, 1981
    Assignee: Nippon Telegraph and Telephone Public Corporation
    Inventors: Shiro Kikuchi, Hitoshi Imagawa, Yasumasa Iwase
  • Patent number: 4244000
    Abstract: A circuit for preventing a dV/dt erroneous operation of a PNPN semiconductor switch is replaced by a capacitance on the surface of a semiconductor substrate, a high resistance gate electrode. In other words, such a circuit is formed on the surface of the substrate by a slight modification of the basic design without decreasing the chip area and without isolating component elements.
    Type: Grant
    Filed: November 20, 1979
    Date of Patent: January 6, 1981
    Assignees: Nippon Telegraph and Telephone Public Corporation, Oki Electric Industry Company, Ltd.
    Inventors: Jun Ueda, Haruo Mori, Kazuo Hagimura, Kotaro Kato
  • Patent number: 4244045
    Abstract: An optical multiplexer and/or optical demultiplexer for multiplexing and/or demultiplexing a plurality of wavelengths comprises a plurality of optical filters each of which transmits a predetermined wavelength and reflects other wavelengths, said optical filters being arranged so that an optical beam is transmitted or reflected via each optical filter in sequence in a zigzag fashion. A light source or light detector is provided behind each optical filter to project or receive a collimated optical beam. The angle of incidence when a beam is applied to an optical filter is small. And, another optical means is provided to connect the present optical multiplexer and/or demultiplexer with an outside optical fiber. The transmission wavelength of each optical filter is different from the others.
    Type: Grant
    Filed: January 31, 1979
    Date of Patent: January 6, 1981
    Assignee: Nippon Telegraph and Telephone Public Corporation
    Inventors: Kiyoshi Nosu, Hideki Ishio, Tetsuya Miki
  • Patent number: 4242538
    Abstract: The service area of the radio telephone system is divided into a plurality of radio zones and a base station is installed in each radio zone. The base station is connected to a control unit through a common control channel and a plurality of speech channels, the control unit is connected to an ordinary telephone network, and the control unit is controlled by first and second sequence controllers for the radio system and an exchange control unit, respectively.In a modification, each first and second sequence controller comprises a plurality of discrete sequence controllers classified according to their functions.
    Type: Grant
    Filed: March 7, 1979
    Date of Patent: December 30, 1980
    Assignee: Nippon Telegraph and Telephone Public Corporation
    Inventors: Sadao Ito, Noriaki Yoshikawa, Mitsuru Komura
  • Patent number: 4242662
    Abstract: A pattern to be examined is scanned to produce binary information of divisional regions of the pattern corresponding to the picture elements of respective scanning lines as parallel information. The parallel information regarding the shape and position of the pattern is concurrently examined under two modes. The second mode includes examination of the vertical edge and the horizontal edge, examination of the vertical and horizontal edges by compensating the deviation of mask setting in the horizontal direction, and examination of the vertical and horizontal edges by compensating the deviation of mask setting in the vertical direction.
    Type: Grant
    Filed: March 30, 1979
    Date of Patent: December 30, 1980
    Assignee: Nippon Telegraph and Telephone Public Corporation
    Inventors: Bunjiro Tsujiyama, Kunio Saito, Kenji Kurihara
  • Patent number: 4240849
    Abstract: A polymer optical circuit with optical lead-fibers which comprise a plurality of optical fibers, each one end portion thereof being embedded in a transparent polymer film formed on a substrate, and polymer optical waveguides formed in the film between the embedded ends of the optical fibers so that the terminal ends of the optical waveguides are connected with the embedded ends of the optical fibers; the substrate, polymer film, polymer optical waveguide and optical fibers being formed as an integrated unit. A process for fabricating this polymer optical circuit is also disclosed.
    Type: Grant
    Filed: June 16, 1978
    Date of Patent: December 23, 1980
    Assignee: Nippon Telegraph and Telephone Public Corporation
    Inventors: Takashi Kurokawa, Norio Takato, Shigeru Oikawa, Yuzo Katayama
  • Patent number: 4241359
    Abstract: A semiconductor manufacturing method and device made therefrom by forming an insulating SiO.sub.2 film on both surfaces of a silicon substrate using an ion implantation process to form a buried SiO.sub.2 layer within the substrate a predetermined depth beneath one of the substrate surfaces, isolating a body of the substrate layer lying above the buried layer, and forming a semiconductive device in the isolated body. The surface layers of SiO.sub.2 serve to mechanically balance the internal strains generated within the substrate during the formation of the buried layer and thereby prevent the creation of mechanical imperfections in the surface portions of the substrate.
    Type: Grant
    Filed: March 2, 1978
    Date of Patent: December 23, 1980
    Assignee: Nippon Telegraph and Telephone Public Corporation
    Inventors: Katsutoshi Izumi, Masanobu Doken, Hisashi Ariyoshi
  • Patent number: 4239329
    Abstract: The optical nonreciprocal device is used to optically couple together two opposed optical fibers. The light from one optical fiber is separated into ordinary ray and extraordinary ray by a first birefringent crystal member. The separated ordinary and extraordinary rays are subject to a total of 90.degree. polarization rotation by transmitting in a forward direction through a magneto-optical member having an angle of polarization rotation of 45.degree. and through a compensating plate. The separated ordinary and extraordinary rays are synthesized by transmitting through a second birefringent crystal member and then applied to the other optical fiber. A lens is interposed between one optical fiber and the first birefringent crystal member for causing the light to propagate through the light path while being converged or diverged.
    Type: Grant
    Filed: July 26, 1979
    Date of Patent: December 16, 1980
    Assignee: Nippon Telegraph and Telephone Public Corporation
    Inventor: Takao Matsumoto
  • Patent number: 4238385
    Abstract: This invention is directed to coating compositions for electrocoating electroconductive substrates for printed circuits comprising a pigment-containing finely divided synthetic resin powder in which the resin comprises an epoxy resin, and the pigment comprises pigments with 2-10 weight parts of finely divided silica, admixed with a water-dilutable cationic resin, and to methods of utilizing the composition for forming an insulating film on an electroconductive substrate.
    Type: Grant
    Filed: August 14, 1979
    Date of Patent: December 9, 1980
    Assignees: Nippon Telegraph and Telephone Public Corporation, Shinto Paint Co., Ltd.
    Inventors: Yasuomi Okado, Ken Nishizaki, Akinobu Tanaka
  • Patent number: 4238768
    Abstract: A frame of a gray-scaled picture is divided into blocks, in each of which the mean luminance of picture elements is used as a threshold value for comparison with each picture element signal to classify it into 0 or 1 according to its magnitude to provide a resolution component. From the resolution component and each picture element signal in the block are calculated two gray components; the resolution component and the two gray components are used as coded outputs for each block.
    Type: Grant
    Filed: November 14, 1978
    Date of Patent: December 9, 1980
    Assignee: Nippon Telegraph and Telephone Public Corporation
    Inventors: Eiji Mitsuya, Tomio Kishimoto, Katsusuke Hoshida
  • Patent number: 4233669
    Abstract: A memory control system comprises a memory unit including a plurality of chips each having a shift register type memory having a plurality of information loops, the number of chips being larger than a predetermined number, the predetermined number of bits out of those bits which are read from or written into the information loops of the respective chips at the same timing constituting a unit information; and an additional memory which stores information indicative of normal loop condition or defective loop condition for each of the information loops in each of the chips and information indicative of whether the number of normal loops in each information loop group corresponding to the bits which are read or written at the same timing is larger than said predetermined number or not.
    Type: Grant
    Filed: April 19, 1978
    Date of Patent: November 11, 1980
    Assignees: Nippon Telegraph and Telephone Public Corporation, Hitachi, Ltd.
    Inventors: Kazuo Furukawa, Sumio Furukawa
  • Patent number: 4233506
    Abstract: A pboto-sensor wherein a bundle of optical fibers is disposed within a predetermined substrate, the optical fiber bundle extending from a first surface to a second surface of the substrate and being formed to be flat, an array of photosensitive elements which have photosensitive parts on an open end face of the optical fibers at the first surface of the substrate is disposed integrally with the substrate, and an end face of the optical fibers at the second surface of the substrate serves as an information reading surface.
    Type: Grant
    Filed: May 5, 1978
    Date of Patent: November 11, 1980
    Assignees: Nippon Telegraph and Telephone Public Corporation, Hitachi, Ltd.
    Inventors: Hideaki Yamamoto, Makoto Matsui, Toshihisa Tsukada, Yoshizumi Eto, Tadaaki Hirai, Eiichi Maruyama
  • Patent number: 4233668
    Abstract: Method and apparatus for testing a magnetic bubble memory are disclosed wherein a most severe magnetic bubble domain arrangement which fully causes the ununiformity of magnetic interaction between magnetic bubble domains is experimentally determined, and a basic pattern [P] and a test information pattern determining an arrangement of the basic patterns [P] and complementary patterns [P] thereof for realizing that magnetic bubble domain arrangement are stored in memory units, respectively, and the basic patterns [P] and the complementary patterns [P] are sequentially read out in accordance with the test information pattern to generate magnetic bubble domain trains in a storage area of the magnetic bubble memory.
    Type: Grant
    Filed: September 29, 1978
    Date of Patent: November 11, 1980
    Assignees: Nippon Telegraph and Telephone Public Corporation, Hitachi, Ltd.
    Inventors: Nakahiko Yamaguchi, Susumu Hibi, Shigeru Yoshizawa, Shoji Yoshimoto, Akira Kobayashi
  • Patent number: 4232219
    Abstract: A photosensor including a fiber substrate having a light receiving window formed in a surface thereof spaced from an information surface to be read, a bundle of optical fibers disposed in the fiber substrate and positioned in the light receiving window. A plurality of color filters of different characteristics are disposed on an end face of the bundle of optical fibers, and a plurality of arrays of photosensitive elements corresponding to the color filters are also provided. The arrays of photosensitive elements are integrally provided with the fiber substrate and disposed in the region of the end face of the bundle of the optical fibers farthest away from the information surface.
    Type: Grant
    Filed: February 27, 1979
    Date of Patent: November 4, 1980
    Assignees: Nippon Telegraph and Telephone Public Corporation, Hitachi, Ltd.
    Inventors: Hideaki Yamamoto, Toshihisa Tsukada, Eiichi Maruyama, Hiroya Inagaki
  • Patent number: 4232071
    Abstract: A method of roducing .gamma.-Fe.sub.2 O.sub.3 magnetic disk medium of continuous thin film is provided, in which a deposition source is deposited on an opposed Al-alloy substrate by means of a reactive vacuum deposition technique and the deposited film is thermally treated so as to be the magnetic disk medium. As the deposition source, a ferroalloy containing about 1 to 10 at.% Ti and about 0.5 to 5 at.% Co is employed.
    Type: Grant
    Filed: June 29, 1977
    Date of Patent: November 4, 1980
    Assignees: Nippon Telegraph and Telephone Public Corporation, Fujitsu Limited
    Inventors: Akira Terada, Seizi Hattori, Yoshikazu Ishii, Akira Nohara, Nobuo Inagaki, Wakatake Matsuda, Susumu Kawakami
  • Patent number: 4231108
    Abstract: An improved semiconductor integrated circuit device having a memory cell array formed of integrated injection logic memory cells. The semiconductor integrated circuit according to the present invention includes integration injection logic memory cells which are arranged in matrix form, word lines and bit lines which are connected to the memory cells arranged in the row or column directions, one of the word lines being formed by a semiconductor bulk, current sources provided at least at both ends of the word lines or the bit lines.
    Type: Grant
    Filed: June 13, 1979
    Date of Patent: October 28, 1980
    Assignees: Nippon Telegraph and Telephone Public Corporation, Fujitsu Limited
    Inventors: Masao Suzuki, Toshio Hayashi, Kuniyasu Kawarada, Kazuhiro Toyoda, Chikai Ono
  • Patent number: 4228525
    Abstract: A semiconductor integrated circuit device has an array of memory cells formed by integrated injection logic. A desired number of dummy cells are provided at both ends of each line of the array, so that a write current, which flows when the memory cell near the dummy cell is selected, is shunted by the dummy cell, thereby the currents which flow in the memory cells in the line of the memory array are equalized.
    Type: Grant
    Filed: May 11, 1979
    Date of Patent: October 14, 1980
    Assignees: Nippon Telegraph and Telephone Public Corporation, Fujitsu Limited
    Inventors: Kuniyasu Kawarada, Masao Suzuki, Chikai Ono, Kazuhiro Toyoda
  • Patent number: 4228545
    Abstract: A receiver device comprises a demodulator for demodulating speech signals received at an input terminal of the device, a delay memory for storing, with a delay, speech signals of prescribed period for a predetermined time, a detector for detecting an abrupt interruption and its period of the received speech signals, a discriminator for discriminating whether the speech signals stored in the delay memory are periodic or non-periodic, an interpolator for creating interpolating information during the abrupt interruption from the signals stored in the delay memory under the control of the detector by receiving the outputs from the discriminator and the abrupt interruption detector, and a switch which is adapted, under the normal condition, to receive and transmit signals from the demodulator to the output of the device, while it is adapted, under the condition that the abrupt interruption and the period thereof is detected, to select signals from the interpolator and to transmit the selected interpolating signals
    Type: Grant
    Filed: April 18, 1979
    Date of Patent: October 14, 1980
    Assignee: Nippon Telegraph & Telephone Public Corporation
    Inventor: Hideyo Murakami