Patents Assigned to NMB Semiconductor Corporation
  • Patent number: 5162890
    Abstract: In a multi-layered integrated memory circuit, a method for using sacrificial layers and insulating "sticks" is disclosed to provide a contact between two layers, where the contact does not short to an intervening layer. This invention provides this with minimal extra processing by using sacrificial layers with appropriate etch and etch stop properties. As these layers are etched, additional layers which alternate in the same conducting/insulating pattern are exposed. Each etch stops on either a conductive or insulative layer. A contact layer may then be deposited which connects the uppermost capacitor plate to the pass transistor of the memory cell.
    Type: Grant
    Filed: April 5, 1991
    Date of Patent: November 10, 1992
    Assignees: Ramtron Corporation, NMB Semiconductor Corporation
    Inventor: Douglas B. Butler