Abstract: The present disclosure provides a high-speed and low-noise dynamic comparator, which includes: an input unit, including an input NMOS transistor and an input PMOS transistor; a latch unit, including a latching NMOS transistor and a latching PMOS transistor, where the latching NMOS transistor and the latching PMOS transistor are connected to form a latch structure; a pull-up unit, including a pull-up PMOS transistor connected to the input NMOS transistor; and a substrate bootstrap voltage generation circuit, generating a substrate bootstrap voltage.