Abstract: A process for creating a broadly tunable Distributed Bragg Reflector (DBR) with a reduced recombination rate. According to the current invention, this may be achieved by creating electron confinement regions and hole confinement regions in the waveguide of the DBR. Preferably, this is achieved by engineering the band gaps of the DBR waveguide and cladding materials. Preferably, the materials selected for use in the DBR may be lattice matched. Alternately, two or more thin electron confinement regions and two or more thin hole confinement regions may be created to take advantage of strain compensation in thinner layers thereby broadening the choices of materials appropriate for use in creating a broadly tunable DBR. Alternately, graded materials and/or graded interfaces may be created according to alternate processes according to the current invention to provide effective electron and/or hole confinement regions in various DBR designs.

Abstract: A wavelength-tunable distributed feedback (DFB) laser is disclosed where the lasing wavelength can be adjusted by adjusting the bias current of the laser diode. Since the output power of the laser diode also changes with the bias current, a one-to-one correspondence between the lasing wavelength and the output power of the laser can be established. Consequently, the lasing wavelength can be measured directly from the photocurrent of a power monitoring detector facing the back-end of the laser diode. This provides an extremely simple method for wavelength monitoring.

Abstract: An integrated surface emitting laser and modulator device is disclosed that includes a detector for monitoring the optical power output of the laser and another detector for monitoring an extinction ratio of the modulator. A cleave physically and electrically separates the laser from the modulator device. The device has a collimating lens disposed on a top surface.

Abstract: A wavelength-tunable distributed feedback (DFB) laser is disclosed where the lasing wavelength can be adjusted by adjusting the bias current of the laser diode. Since the output power of the laser diode also changes with the bias current, a one-to-one correspondence between the lasing wavelength and the output power of the laser can be established. Consequently, the lasing wavelength can be measured directly from the photocurrent of a power monitoring detector facing the back-end of the laser diode. This provides an extremely simple method for wavelength monitoring.

Abstract: A method is disclosed for separating a semiconductor epitaxial structure from an insulating growth substrate. The method utilizes electrochemical anodic reactions to remove a thin etch layer disposed near the growth interface. The thin etch layer can be an intentional layer made of a material different from the epitaxial structure and/or can include a material with a high defect density. The method can be applied in the fabrication of optoelectronic and electronic devices from III-V materials, in particular gallium-nitride based materials.

Abstract: An avalanche photodetector (APD) is made from composite semiconductor materials. The absorption region of the APD is formed in a n-type InGaAs layer. The multiplication region of the APD is formed in a p-type silicon layer. The two layers are bonded together. The p-type silicon layer may be supported on an n+ type silicon substrate. A p-n junction formed at the interface between the silicon layer and the substrate. Alternatively, the n-type InGaAs layer may be supported on an InP substrate. In this case, a p-n junction is formed by making n-doped surface regions in the p-type silicon superlayer. In either case, the p-n junction is reverse biased for avalanche multiplication of charge carriers. The maximum of the electric field distribution in the APD under reverse bias operating conditions is located at p-n junction. This maximum is at a distance equal to about the thickness of the p-type silicon layer away from the absorption region.

Abstract: This invention describes a method for fabricating light-emitting diodes with an improved external quantum efficiency on a transparent substrate. The LED device structure is mounted face-down on and bonded to a handling wafer. The LED dies on the transparent substrate are separated by applying mutually aligned separation cuts from both sides of the transparent substrate and by then cutting through the handling wafer and the substrate wafer. This method allow the use of substrates that are difficult to thin and cleave. Contacts can be applied from one side of the devices only. The method is suitable for low cost high volume manufacturing.

Abstract: A planar avalanche photodetector (APD) is fabricated by forming a, for example, InGaAs absorption layer on a p+-type semiconductor substrate, such as InP, and wafer-bonding to the absorption layer a second p-type semiconductor, such as Si, to form a multiplication layer. The layer thickness of the multiplication layer is substantially identical to that of the absorption layer. A region in a top surface of the p-type Si multiplication layer is doped n+-type to form a carrier separation region and a high electric field in the multiplication region. The APD can further include a guard-ring to reduce leakage currents as well as a resonant mirror structure to provide wavelength selectivity. The planar geometry furthermore favors the integration of high-speed electronic circuits on the same substrate to fabricate monolithic optoelectronic transceivers.

Abstract: A method for producing a stress-engineered substrate includes selecting first and second materials for forming the substrate. An epitaxial material for forming a heteroepitaxial layer is then selected. If the lattice constant of the heteroepitaxial layer (aepi) is greater than that (asub) of the immediate substrate layer the epitaxial layer is deposited on, then the epitaxial layer is kept under “compressive stress” (negative stress) at all temperatures of concern. On the other hand, if the lattice constant of the heteroepitaxial layer (aepi) is less than that (asub) of the immediate substrate layer the epitaxial layer is deposited on, then the epitaxial layer is kept under “tensile stress” (positive stress). The temperatures of concern range from the annealing temperature to the lowest temperature where dislocations are still mobile.

Abstract: A planar avalanche photodetector (APD) is fabricated by forming a, for example, InGaAs absorption layer on a p+-type semiconductor substrate, such as InP, and wafer-bonding to the absorption layer a second p-type semiconductor, such as Si, to form a multiplication layer. The layer thickness of the multiplication layer is substantially identical to that of the absorption layer. A region in a top surface of the p-type Si multiplication layer is doped n+-type to form a carrier separation region and a high electric field in the multiplication region. The APD can further include a guard-ring to reduce leakage currents as well as a resonant mirror structure to provide to wavelength selectivity. The planar geometry furthermore favors the integration of high-speed electronic circuits on the same substrate to fabricate monolithic optoelectronic transceivers.

Abstract: The method of the present invention is used to join two dissimilar materials together, and particularly to transfer a film to a substrate when the difference in thermal expansion coefficients between the film and the substrate is very big. A hydrophilic surface is created on one material and an atmosphere reactive metal element is deposited on the surface of another material. When the materials are tightly contacted, with the reactive element pressed against the hydrophilic surface, the reactive metal element reacts with the moisture from the hydrophilic surface at room temperature. Strong bonds form during the reaction joining the two materials together. Because the procedure takes place at room temperature, extremely low stress is built in. The film joining is successful even with a big thermal expansion coefficient difference between the materials, such as exist between GaAs and silicon and between silicon and sapphire.

Abstract: A method of semiconductor eutectic alloy metal (SEAM) technology for integration of heterogeneous materials and fabrication of compliant composite substrates takes advantage of eutectic properties of alloys. Sub1 and Sub2 are used to represent the two heterogeneous materials to be bonded or composed into a compliant composite substrate. For the purpose of fabricating compliant composite substrate, the first substrate material (Sub1) combines with the second substrate material (Sub2) to form a composite substrate that controls the stress in the epitaxial layers during cooling. The second substrate material (Sub2) controls the stress in the epitaxial layer grown thereon so that it is compressive during annealing. A joint metal (JM) with a melting point of Tm is chosen to offer variable joint stiffness at different temperatures. JM and Sub1 form a first eutectic alloy at a first eutectic temperature Teu1 while JM and Sub2 form a second eutectic alloy at a second eutectic temperature Teu2.

Abstract: A method for producing a stress-engineered substrate includes selecting first and second materials for forming the substrate. An epitaxial material for forming a heteroepitaxial layer is then selected. If the lattice constant of the heteroepitaxial layer (aepi) is greater than that (asub) of the immediate substrate layer the epitaxial layer is deposited on, then the epitaxial layer is kept under “compressive stress” (negative stress) at all temperatures of concern. On the other hand, if the lattice constant of the heteroepitaxial layer (aepi) is less than that (asub) of the immediate substrate layer the epitaxial layer is deposited on, then the epitaxial layer is kept under “tensile stress” (positive stress). The temperatures of concern range from the annealing temperature to the lowest temperature where dislocations are still mobile.

Abstract: A method of semiconductor eutectic alloy metal (SEAM) technology for integration of heterogeneous materials and fabrication of compliant composite substrates takes advantage of eutectic properties of alloys. Sub1 and Sub2 are used to represent the two heterogeneous materials to be bonded or composed into a compliant composite substrate. For the purpose of fabricating compliant composite substrate, the first substrate material (Sub1) combines with the second substrate material (Sub2) to form a composite substrate that controls the stress in the epitaxial layers during cooling. The second substrate material (Sub2) controls the stress in the epitaxial layer grown thereon so that it is compressive during annealing. A joint metal (JM) with a melting point of Tm is chosen to offer variable joint stiffness at different temperatures. JM and Sub1 form a first eutectic alloy at a first eutectic temperature Teu1 while JM and Sub2 form a second eutectic alloy at a second eutectic temperature Teu2.