Abstract: The invention provides a transient voltage detecting circuit for detecting changes of voltage in an electronic system which has a first power supply (VDD), a second power supply (VDD), a third power supply (VDD), a fourth power supply (VDD), a first ground (GND), and a second ground (GND). The voltage of the first VDD is substantially equal to that of the second VDD. The voltage of the third VDD is substantially equal to that of the fourth VDD. The voltage of the first GND is substantially equal to that of the second GND. The circuit according to the invention can detect a positive or negative transient voltage once that occurs at the first VDD, the second VDD, the third VDD, or the fourth VDD.

Abstract: The invention provides a transient voltage detecting circuit for detecting a transient voltage occurring at a power supply or a ground of an electronic system. The circuit according to the invention includes a plurality of detecting units of which the outputs are initially latched by at least one voltage source. The circuit also includes a detecting device outputting a first logic according to the initial outputs of all of the detecting units. When the transient voltage occurs, it is ensured that the logic of the output of one of the detecting units is changed by the transient voltage or the decayed transient voltage, such that the decision device renewably outputs a second logic to trigger a resetting device of the electronic system in accordance with the outputs of all of the detecting units.

Abstract: The present invention is a data processing system, which comprises a microprocessor. The microprocessor comprises a central processing unit (CPU) and a built-in non-volatile program memory for storing a startup program. The system further comprises a volatile memory, a permanent memory for storing an application program permanently, a bus connected to the microprocessor, the volatile memory and the permanent memory, and a power supply for providing power to the data processing system. While the switch of the power supply is turned on, the startup program stored in the non-volatile program memory is initialized first to transmit the application program stored in the permanent memory to the volatile memory via the bus, so that the CPU only needs to call and execute the application program in the volatile memory, instead of the permanent memory, and doesn't need to read the permanent memory repeatedly to avoid reducing the system efficiency.

Abstract: The present invention is a pipelined analog-to-digital converter (Pipelined ADC) for converting a first analog signal to a digital data. The converter comprises at least one first stage circuit, at least one second stage circuit, a third stage circuit, and a code adder. Each of the first stage circuits has a first converting rate for converting a first analog signal to at least one digital code and generating a second analog signal. The second stage circuits are serially connected after the first stage circuit. Each of the second stage circuits has a second converting rate which is higher than the first converting rate for converting the second analog signal to at least two digital codes and generating a third analog signal. The third stage circuit serially connected after the second stage circuits is used for converting the third analog signal to at least one digital code. The code adder is used for combining the digital codes to generate the digital data.

Abstract: The present invention provides a correction system and method for a Successive Approximation A/D Converter (SA-ADC) of the prior art. The operation method of the correction system is described in the following: (1) Using the SA-ADC of the prior art to convert an analog signal to a digital data. The digital data is a series of logic numbers. (2) Detecting the last number of the digital data is logic number [0] or logic number [1]. (3-1) When the last number is logic number [1], proceeding the digital data and logic number [1] with an addition operation to generate a first detection digital data. Converting the first detection digital data to a first detection signal for comparing with the analog signal. If the analog signal is higher than the first detection signal, then replacing the digital data by the first detection digital data. If the analog signal is lower than the first detection signal, then outputting the digital data without correcting.