Abstract: A single crystal manufacturing apparatus to grow a single crystal upward from a seed crystal, the apparatus including an insulated space thermally insulated from a space outside the single crystal manufacturing apparatus, an induction heating coil placed outside the insulated space, a thermal insulation plate that divides the insulated space into a first space including a crystal growth region to grow the single crystal and a second space above the first space and includes a hole above the crystal growth region, a heating element that is placed in the second space and generates heat by induction heating using the induction heating coil to heat the inside of the insulated space, and a support shaft to vertically movably support the seed crystal from below.

Abstract: A semiconductor substrate includes at least one main surface as a crystal growth base surface, and a gallium oxide-based semiconductor single crystal. The growth base surface is a (001) plane. An off angle in a [010] direction in a continuous region of not less than 70 area % of the growth base surface is in a range of more than ?0.3° and not more than ?0.01°, or in a range of not less than 0.01° and less than 0.3°. An off angle in a [001] direction in the region of the growth base surface is in a range of not less than ?1° and not more than 1°. The semiconductor substrate has a diameter of not less than 2 inches.

Abstract: A semiconductor substrate includes at least one main surface as a crystal growth base surface, and a gallium oxide-based semiconductor single crystal. The growth base surface is a (001) plane. An off angle in a [010] direction in a continuous region of not less than 70 area % of the growth base surface is in a range of more than ?0.3° and not more than ?0.01°, or in a range of not less than 0.010 and less than 0.3°. An off angle in a [001] direction in the region of the growth base surface is in a range of not less than ?1° and not more than 1°. The semiconductor substrate has a diameter of not less than 2 inches.

Abstract: A field-effect transistor includes an n-type semiconductor layer that includes a Ga2O3-based single crystal and a plurality of trenches opening on one surface, a gate electrode buried in each of the plurality of trenches, a source electrode connected to a mesa-shaped region between adjacent trenches in the n-type semiconductor layer, and a drain electrode directly or indirectly connected to the n-type semiconductor layer on an opposite side to the source electrode.

Abstract: A Schottky barrier diode includes a semiconductor layer of a first conductivity type including a wide-bandgap semiconductor and a trench defining a mesa portion on a first surface thereof, a high-resistance region under the trench of the semiconductor layer, the high-resistance region including an impurity of a second conductivity type different from the first conductivity type, an insulating film or a semiconductor film of the second conductivity type, the insulating film or semiconductor film covering at least a bottom surface among inner surfaces of the trench, an anode electrode on the semiconductor layer through the insulating film or the semiconductor film, the anode electrode being connected to the mesa portion, and a cathode electrode directly or through another layer on a second surface of the semiconductor layer on the opposite side to the first surface.

Abstract: A field-effect transistor includes a Ga2O3-based semiconductor layer, a source region and a drain region that are formed inside the Ga2O3-based semiconductor layer, a gate electrode that is formed, via a gate insulating film, on a channel region as the Ga2O3-based semiconductor layer between the source region and the drain region, a source electrode connected to the source region, and a drain electrode connected to the drain region. An interface charge including a negative charge is formed between the gate electrode and the channel region, and a gate threshold voltage is not less than 4.5V.

Abstract: A Schottky barrier diode includes a semiconductor layer including a Ga2O3-based single crystal, an anode electrode that forms a Schottky junction with the semiconductor layer and is configured so that a portion in contact with the semiconductor layer includes Mo or W, and a cathode electrode. A turn-on voltage thereof is not less than 0.3 V and not more than 0.5 V.

Abstract: A Schottky barrier diode includes an n-type semiconductor layer including a gallium oxide-based semiconductor, an insulating film including SiO2 and covering a portion of an upper surface of the n-type semiconductor layer, and an anode electrode which is connected to the upper surface of the n-type semiconductor layer to form a Schottky junction with the n-type semiconductor layer and at least a portion of an edge of which is located on the insulating film. The insulating film further includes a first layer in contact with the n-type semiconductor layer and a second layer on the first layer. A refractive index of the first layer is lower than a refractive index of the second layer. The n-type semiconductor layer further includes a guard ring surrounding a junction with the anode electrode.

Abstract: A Schottky barrier diode includes an n-type semiconductor layer including a gallium oxide-based semiconductor, an insulating film including SiO2 and covering a portion of an upper surface of the n-type semiconductor layer, and an anode electrode which is connected to the upper surface of the n-type semiconductor layer to form a Schottky junction with the n-type semiconductor layer and at least a portion of an edge of which is located on the insulating film. The insulating film further includes a first layer in contact with the n-type semiconductor layer and a second layer on the first layer. A refractive index of the first layer is lower than a refractive index of the second layer.

Abstract: A single crystal manufacturing apparatus to grow a single crystal upward from a seed crystal, the apparatus including an insulated space thermally insulated from a space outside the single crystal manufacturing apparatus, an induction heating coil placed outside the insulated space, a thermal insulation plate that divides the insulated space into a first space including a crystal growth region to grow the single crystal and a second space above the first space and includes a hole above the crystal growth region, a heating element that is placed in the second space and generates heat by induction heating using the induction heating coil to heat the inside of the insulated space, and a support shaft to vertically movably support the seed crystal from below.

Abstract: A single crystal manufacturing apparatus to grow a single crystal upward from a seed crystal, the apparatus including an insulated space thermally insulated from a space outside the single crystal manufacturing apparatus, an induction heating coil placed outside the insulated space, a thermal insulation plate that divides the insulated space into a first space including a crystal growth region to grow the single crystal and a second space above the first space and includes a hole above the crystal growth region, a heating element that is placed in the second space and generates heat by induction heating using the induction heating coil to heat the inside of the insulated space, and a support shaft to vertically movably support the seed crystal from below.

Abstract: A field-effect transistor includes an n-type semiconductor layer that includes a Ga2O3-based single crystal and a plurality of trenches opening on one surface, a gate electrode buried in each of the plurality of trenches, a source electrode connected to a mesa-shaped region between adjacent trenches in the n-type semiconductor layer, and a drain electrode directly or indirectly connected to the n-type semiconductor layer on an opposite side to the source electrode.

Abstract: A gallium oxide crystal manufacturing device includes a crucible to hold a gallium oxide source material therein, a crucible support that supports the crucible from below, a crucible support shaft that is connected to the crucible support from below and vertically movably supports the crucible and the crucible support, a tubular furnace core tube that surrounds the crucible, the crucible support and the crucible support shaft, a tubular furnace inner tube that surrounds the furnace core tube, and a resistive heating element including a heat-generating portion placed in a space between the furnace core tube and the furnace inner tube. Melting points of the furnace core tube and the furnace inner tube are not less than 1900° C. A thermal conductivity of a portion of the furnace core tube located directly next to the crucible in a radial direction thereof is higher than a thermal conductivity of the furnace inner tube.

Abstract: A single crystal growth apparatus to grow a single crystal of a gallium oxide-based semiconductor. The apparatus includes a crucible that includes a seed crystal section to accommodate a seed crystal, and a growing crystal section which is located on the upper side of the seed crystal section and in which the single crystal is grown by crystallizing a raw material melt accommodated therein, a tubular susceptor surrounding the seed crystal section and also supporting the crucible from below, and a molybdenum disilicide heating element to melt a raw material in the growing crystal section to obtain the raw material melt. The susceptor includes a thick portion at a portion in a height direction that is thicker and has a shorter horizontal distance from the seed crystal section than other portions. The thick portion surrounds at least a portion of the seed crystal section in the height direction.

Abstract: A Schottky barrier diode includes a semiconductor substrate made of gallium oxide, a drift layer made of gallium oxide and provided on the semiconductor substrate, an anode electrode brought into Schottky contact with the drift layer, and a cathode electrode brought into ohmic contact with the semiconductor substrate. The drift layer has a plurality of trenches formed in a position overlapping the anode electrode in a plan view. Among the plurality of trenches, a trench positioned at the end portion has a selectively increased width. Thus, the curvature radius of the bottom portion of the trench is increased, or an edge part constituted by the bottom portion as viewed in a cross section is divided into two parts. As a result, an electric field to be applied to the bottom portion of the trench positioned at the end portion is mitigated, making dielectric breakdown less likely to occur.

Abstract: An object of the present invention is to provide a Schottky barrier diode less liable to cause dielectric breakdown due to concentration of an electric field. A Schottky barrier diode according to this disclosure includes a semiconductor substrate made of gallium oxide, a drift layer made of gallium oxide and provided on the semiconductor substrate, an anode electrode 40 brought into Schottky contact with the drift layer, a cathode electrode brought into ohmic contact with the semiconductor substrate, an insulating layer provided on the drift layer so as to surround the anode electrode in a plan view, and a semiconductor layer provided on a surface of a part of the drift layer that is positioned between the anode electrode and the insulating layer and on the insulating layer. The semiconductor layer has a conductivity type opposite to that of the drift layer.

Abstract: A field-effect transistor includes an n-type semiconductor layer that includes a Ga2O3-based single crystal and a plurality of trenches opening on one surface, a gate electrode buried in each of the plurality of trenches, a source electrode connected to a mesa-shaped region between adjacent trenches in the n-type semiconductor layer, and a drain electrode directly or indirectly connected to the n-type semiconductor layer on an opposite side to the source electrode.

Abstract: A trench-type MESFET includes an n-type semiconductor layer including a Ga2O3-based single crystal and including plural trenches opening on one surface, first insulators respectively buried in bottom portions of the plural trenches, gate electrodes respectively buried in the plural trenches so as to be placed on the first insulators and so that side surfaces thereof are in contact with the n-type semiconductor layer, a source electrode connected to a mesa-shaped portion between the adjacent trenches of the n-type semiconductor layer, second insulators respectively buried in the plural trenches so as to be placed on the gate electrodes to insulate the gate electrodes and the source electrode, and a drain electrode directly or indirectly connected to the n-type semiconductor layer on a side opposite to the source electrode.

Abstract: A semiconductor device includes a lead frame including a raised portion on a surface, and a semiconductor element that is face-down mounted on the lead frame and includes a substrate including a Ga2O3-based semiconductor, an epitaxial layer including a Ga2O3-based semiconductor and stacked on the substrate, a first electrode connected to a surface of the substrate on an opposite side to the epitaxial layer, and a second electrode connected to a surface of the epitaxial layer on an opposite side to the substrate and including a field plate portion at an outer peripheral portion. The semiconductor element is fixed onto the raised portion. An outer peripheral portion of the epitaxial layer, which is located on the outer side of the field plate portion, is located directly above a flat portion of the lead frame that is a portion at which the raised portion is not provided.

Abstract: A method for manufacturing a semiconductor element includes preparing a semiconductor wafer that includes a substrate including a Ga2O3-based semiconductor and an epitaxial layer including a Ga2O3-based semiconductor and located on the substrate, fixing the epitaxial layer side of the semiconductor wafer to a support substrate, thinning the substrate of the semiconductor wafer fixed to the support substrate, after the thinning of the substrate, forming an electrode on a lower surface of the substrate, bonding or forming a support metal layer on a lower surface of the electrode of the semiconductor wafer, and dicing the semiconductor wafer into individual pieces, thereby obtaining plural semiconductor elements each including the support metal layer. Thermal conductivity of the support metal layer is higher than thermal conductivity of the substrate.