Abstract: A line power control method and system for a unified power flow controller includes outer loop line power control, inner loop valve side current control, and converter valve control. Series-side converter valve side current reference values Isedref and Iseqref are calculated by means of the outer loop line power control according to line power instructions Pref and Qref that are input, a measured line power UL, and measured line power Pline and Qline; a converter output voltage reference value Ucref is calculated by means of the inner valve side current control according to the valve side current reference values that are output by means of the outer loop power control, a measured valve side current, and a measured valve side voltage; and finally, a converter outputs, according to the voltage reference value, a corresponding voltage to control line power to achieve a reference value.

Abstract: A relay protection method against LC parallel circuit detuning faults comprises the steps of: a relay protection device samples a current of a parallel LC, that is, a reactor and a capacitor, and samples a total current flowing through the whole LC; convert the current of the reactor into a current of an equivalent capacitor; calculate amplitudes of the current of the equivalent capacitor and a current of a realistic capacitor and calculate an amplitude of the total current flowing through the LC; calculate a current amplitude ratio of the equivalent capacitor to the realistic capacitor; and when the amplitude of the total current flowing through the LC is large enough, send an alarm signal or a trip after a setting time delay if the current ratio exceeds a preset upper and lower limit range. Also provided is a corresponding relay protection device.

Abstract: A unified power flow controller for a double-circuit transmission line comprises at least one parallel-connection transformer, three current converters, at least two series-connection transformers, a parallel-connection side switching circuit, a series-connection side switching circuit and a direct current common bus. The series-connection transformers connected with at least one group of by-pass switches in parallel. The three current converters connected to each loop line in series after being connected with at least one series-connection transformer through the series-connection side switching circuit. The three current converters connected to an alternating current system after connected with at least one parallel-connection transformer through a parallel-connection side switching circuit starting circuit. The three current converters are connected to the direct current common bus through a transfer switch.

Abstract: A signal name based method for automatic signal exchange between multiple embedded CPU boards, includes: dividing CPU boards into master board and slave board, where each slave board sends signal registration information to the master board; reading an exchange relationship between an output signal and an input signal that is represented by a connection line between signal names, calculating and allocating a data bus address to which the output signal and the input signal are mapped, and sending memory addresses, data types, and bus addresses of signals to each slave board; saving these as output signal tables and input signal tables; and writing, by a signal sender, a value of an output signal into a corresponding bus address according to the output signal tables, and reading, by a receiver, a value of an input signal from a corresponding bus address according to the input signal tables.

Abstract: A tripolar VSC-HVDC system and method include a rectifier and an inverter formed by a three-phase six-bridge arms modular multilevel converter (MMC) respectively, and two converter valves are arranged on the DC side of the rectifier and inverter respectively. The midpoint of upper and lower converter valves of the rectifier and inverter are connected with a pole 3 DC line by a smoothing reactor. Triggering of the upper and lower converter valves is controlled to change the DC voltage polarity of the pole 3 periodically, and tripolar DC transmission is realized by modulating current orders of the three poles.

Abstract: A high voltage/ultrahigh voltage direct current transmission inverter side frequency control implementing method includes: transmitting a deviation between the inverter side power grid frequency and rated frequency to the inverter side frequency controller, wherein the frequency controller regulates and outputs a modulation quantity by adopting self-adaptive parameters according to different operation conditions; when the interstation communication is normal, the modulation quantity output of the inverter side frequency controller causes the rectifier side and the inverter side to form a new power/current order through the interstation communication; when the interstation communication is abnormal, converting the inverter side to current control from voltage control and converting the rectifier side to voltage control from current control; superposing the modulation quantity output of the inverter side frequency controller to the power/current order of the inverter side, changing the size of the transmission