Abstract: A transceiver integrated circuit (IC) receives signals having a mix of idle characters and data via a multi-lane system-side signaling interface at a first signaling rate compliant with a standards-based signaling protocol. The transceiver IC outputs signals via a multi-lane line-side signaling interface at a second signaling rate that is lower than the first signaling rate and non-compliant with the standards-based signaling protocol and also outputs one or more requests to a remote IC source of the signals received via the system-side signaling interface to adjust a proportion of idle characters within the received signals as necessary to balance a data rate of the received signals with the second signaling rate without adjusting the first signaling rate.