Patents Assigned to NVIDIA Corporation
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Patent number: 11816404Abstract: Monte Carlo and quasi-Monte Carlo integration are simple numerical recipes for solving complicated integration problems, such as valuating financial derivatives or synthesizing photorealistic images by light transport simulation. A drawback of a straightforward application of (quasi-)Monte Carlo integration is the relatively slow convergence rate that manifests as high error of Monte Carlo estimators. Neural control variates may be used to reduce error in parametric (quasi-)Monte Carlo integration—providing more accurate solutions in less time. A neural network system has sufficient approximation power for estimating integrals and is efficient to evaluate. The efficiency results from the use of a first neural network that infers the integral of the control variate and using normalizing flows to model a shape of the control variate.Type: GrantFiled: October 29, 2020Date of Patent: November 14, 2023Assignee: NVIDIA CorporationInventors: Thomas Müller, Fabrice Pierre Armand Rousselle, Alexander Georg Keller, Jan Novák
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Patent number: 11816890Abstract: In various examples, one or more Machine Learning Models (MLMs) are used to identify content items in a video stream and present information associated with the content items to viewers of the video stream. Video streamed to a user(s) may be applied to an MLM(s) trained to detect an object(s) therein. The MLM may directly detect particular content items or detect object types, where a detection may be narrowed to a particular content item using a twin neural network, and/or an algorithm. Metadata of an identified content item may be used to display a graphical element selectable to acquire the content item in the game or otherwise. In some examples, object detection coordinates from an object detector used to identify the content item may be used to determine properties of an interactive element overlaid on the video and presented on or in association with a frame of the video.Type: GrantFiled: August 20, 2021Date of Patent: November 14, 2023Assignee: NVIDIA CorporationInventors: Alexander Hropak, Andrew Fear
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Patent number: 11816790Abstract: A rule set or scene grammar can be used to generate a scene graph that represents the structure and visual parameters of objects in a scene. A renderer can take this scene graph as input and, with a library of content for assets identified in the scene graph, can generate a synthetic image of a scene that has the desired scene structure without the need for manual placement of any of the objects in the scene. Images or environments synthesized in this way can be used to, for example, generate training data for real world navigational applications, as well as to generate virtual worlds for games or virtual reality experiences.Type: GrantFiled: December 10, 2020Date of Patent: November 14, 2023Assignee: Nvidia CorporationInventors: Jeevan Devaranjan, Sanja Fidler, Amlan Kar
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Patent number: 11816987Abstract: In various examples, audio alerts of emergency response vehicles may be detected and classified using audio captured by microphones of an autonomous or semi-autonomous machine in order to identify travel directions, locations, and/or types of emergency response vehicles in the environment. For example, a plurality of microphone arrays may be disposed on an autonomous or semi-autonomous machine and used to generate audio signals corresponding to sounds in the environment. These audio signals may be processed to determine a location and/or direction of travel of an emergency response vehicle (e.g., using triangulation). Additionally, to identify siren types—and thus emergency response vehicle types corresponding thereto—the audio signals may be used to generate representations of a frequency spectrum that may be processed using a deep neural network (DNN) that outputs probabilities of alert types being represented by the audio data.Type: GrantFiled: November 18, 2020Date of Patent: November 14, 2023Assignee: NVIDIA CorporationInventors: Ambrish Dantrey, Atousa Torabi, Anshul Jain, Ram Ganapathi, Abhijit Patait, Revanth Reddy Nalla, Niranjan Avadhanam
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Patent number: 11816482Abstract: A method, computer readable medium, and processor are disclosed for performing matrix multiply and accumulate (MMA) operations. The processor includes a datapath configured to execute the MMA operation to generate a plurality of elements of a result matrix at an output of the datapath. Each element of the result matrix is generated by calculating at least one dot product of corresponding pairs of vectors associated with matrix operands specified in an instruction for the MMA operation. A dot product operation includes the steps of: generating a plurality of partial products by multiplying each element of a first vector with a corresponding element of a second vector; aligning the plurality of partial products based on the exponents associated with each element of the first vector and each element of the second vector; and accumulating the plurality of aligned partial products into a result queue utilizing at least one adder.Type: GrantFiled: August 18, 2022Date of Patent: November 14, 2023Assignee: NVIDIA CorporationInventors: Brent Ralph Boswell, Ming Y. Siu, Jack H. Choquette, Jonah M. Alben, Stuart Oberman
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Patent number: 11816481Abstract: A method, computer readable medium, and processor are disclosed for performing matrix multiply and accumulate (MMA) operations. The processor includes a datapath configured to execute the MMA operation to generate a plurality of elements of a result matrix at an output of the datapath. Each element of the result matrix is generated by calculating at least one dot product of corresponding pairs of vectors associated with matrix operands specified in an instruction for the MMA operation. A dot product operation includes the steps of: generating a plurality of partial products by multiplying each element of a first vector with a corresponding element of a second vector; aligning the plurality of partial products based on the exponents associated with each element of the first vector and each element of the second vector; and accumulating the plurality of aligned partial products into a result queue utilizing at least one adder.Type: GrantFiled: August 18, 2022Date of Patent: November 14, 2023Assignee: NVIDIA CorporationInventors: Brent Ralph Boswell, Ming Y. Siu, Jack H. Choquette, Jonah M. Alben, Stuart Oberman
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Patent number: 11818192Abstract: In various examples, the decoding and upscaling capabilities of a client device are analyzed to determine encoding parameters and operations used by a content streaming server to generate encoded video streams. The quality of the upscaled content of the client device may be monitored by the streaming servers such that the encoding parameters may be updated based on the monitored quality. In this way, the encoding operations of one or more streaming servers may be more effectively matched to the decoding and upscaling abilities of one or more client devise such that an increased number of client devices may be served by the streaming servers.Type: GrantFiled: February 28, 2022Date of Patent: November 14, 2023Assignee: NVIDIA CorporationInventors: Prabindh Sundareson, Sachin Pandhare, Shyam Raikar
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Patent number: 11808805Abstract: One embodiment of the present invention sets forth an integrated circuit. The integrated circuit includes a plurality of subunits associated with a plurality of operating voltages. The integrated circuit also includes one or more voltage regulator circuits that convert a first input voltage into a first plurality of output voltages during a first test, wherein the plurality of output voltages is delivered to the plurality of subunits via a plurality of output channels.Type: GrantFiled: July 27, 2022Date of Patent: November 7, 2023Assignee: NVIDIA CorporationInventors: Francisco Da Silva, Li-Wei Ko, Shang-Ju Lee, Shyh-Horng Lin
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Patent number: 11809989Abstract: When a signal glitches, logic receiving the signal may change in response, thereby charging and/or discharging nodes within the logic and dissipating power. Providing a glitch-free signal may reduce the number of times the nodes are charged and/or discharged, thereby reducing the power dissipation. A technique for eliminating glitches in a signal is to insert a storage element that samples the signal after it is done changing to produce a glitch-free output signal. The storage element is enabled by a “ready” signal having a delay that matches the delay of circuitry generating the signal. The technique prevents the output signal from changing until the final value of the signal is achieved. The output signal changes only once, typically reducing the number of times nodes in the logic receiving the signal are charged and/or discharged so that power dissipation is also reduced.Type: GrantFiled: July 2, 2020Date of Patent: November 7, 2023Assignee: NVIDIA CorporationInventor: William James Dally
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Patent number: 11809719Abstract: Various embodiments include a memory device that is capable of performing write training operations. Prior approaches for write training involve storing a long data pattern into the memory followed by reading the long data pattern to determine whether the data was written to memory correctly. Instead, the disclosed memory device stores a first data pattern (e.g., in a FIFO memory within the memory device) or generates the first data pattern (e.g., using PRBS) that is compared with a second data pattern being transmitted to the memory device by an external memory controller. If data patterns match, then the memory device stores a pass status in a register, otherwise a fail status is stored in the register. The memory controller reads the register to determine whether the write training passed or failed.Type: GrantFiled: December 14, 2021Date of Patent: November 7, 2023Assignee: NVIDIA CORPORATIONInventors: Gautam Bhatia, Robert Bloemer
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Patent number: 11810632Abstract: In various examples, a test system is provided for executing built-in-self-test (BIST) according to JTAG and IEEE 1500 on chips deployed in-field. Hardware and software selectively connect onto the IEEE 1500 serial interface for running BIST while the chip is being used in deployment—such as in an autonomous vehicle. In addition to providing a mechanism to connect onto the serial interface, the hardware and software may reduce memory requirements and runtime associated with running the test sequences, thereby making BIST possible in deployment. Furthermore, some embodiments include components configured to store functional states of clocks, power, and input/output prior to running BIST, which permits restoration of the functional states after the BIST.Type: GrantFiled: August 22, 2022Date of Patent: November 7, 2023Assignee: NVIDIA CorporationInventors: Anitha Kalva, Jue Wu
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Patent number: 11810274Abstract: Apparatuses, systems, and techniques to perform effective tone management for image data. In an embodiment, a set of contrast gain curves are generated corresponding to a set of tonal ranges of an input image. An output image may then be generated by at least applying corresponding contrast gain curves to tonal ranges of the input image.Type: GrantFiled: March 4, 2021Date of Patent: November 7, 2023Assignee: NVIDIA CORPORATIONInventors: Sung Hyun Hwang, Eric Dujardin, Yining Deng
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Patent number: 11810268Abstract: Apparatuses, systems, and techniques are presented to generate images with one or more visual effects applied. In at least one embodiment, one or more visual effects are applied to one or more images having a resolution that is less than a first resolution and those visual effects approximated for one or more images having a resolution that is greater than or equal to the first resolution.Type: GrantFiled: February 4, 2022Date of Patent: November 7, 2023Assignee: NVIDIA CorporationInventors: Robert Pottorff, David Tarjan, Andrew Tao, Bryan Catanzaro
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Patent number: 11809773Abstract: A virtual reality (VR) audio rendering system and method include spatializing microphone-captured real-world sounds according to a VR setting. In a game streaming system, when a player speaks through a microphone, the voice is processed by geometrical acoustic (GA) simulation configured for a virtual scene, and thereby spatialized audio effects specific to the scene are added. The GA simulation may include generating an impulse response using sound propagation simulation and dynamic HRTF-based listener directivity. When the GA-processed voice of the player is played, the local player or other fellow players can hear it as if the sound travels in the scenery and according to the geometries in the virtual scene. This mechanism can advantageously place the players' chatting in the same virtual world like built-in game audio, thereby advantageously providing enhanced immersive VR experience to users.Type: GrantFiled: June 2, 2020Date of Patent: November 7, 2023Assignee: NVIDIA CorporationInventors: Ambrish Dantrey, Anshul Gupta
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Patent number: 11812589Abstract: Systems and methods for cooling a datacenter are disclosed. In at least one embodiment, a refrigerant distribution unit (RDU) distributes first refrigerant from a refrigerant reservoir to one or more cold plates to extract heat from at least one computing device and also interfaces between a first refrigerant cooling loop having a first refrigerant and a second refrigerant cooling loop, so that a second refrigerant cooling loop uses second refrigerant to dissipate at least part of such heat through a second condenser unit to an ambient environment.Type: GrantFiled: May 12, 2021Date of Patent: November 7, 2023Assignee: Nvidia CorporationInventor: Ali Heydari
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Patent number: 11809319Abstract: The technology disclosed herein involves tracking contention and using the tracked contention to manage processor cache. The technology can be implemented in a processor's cache controlling logic and can enable the processor to track which locations in main memory are contentious. The technology can use the contentiousness of locations to determine where to store the data in cache and how to allocate and evict cache lines in the cache. In one example, the technology can store the data in a shared cache when the location is contentious and can bypass the shared cache and store the data in the private cache when the location is uncontentious. This may be advantageous because storing the data in shared cache can reduce or avoid having multiple copies in different private caches and can reduce the cache coherency overhead involved to keep copies in the private caches in sync.Type: GrantFiled: January 20, 2022Date of Patent: November 7, 2023Assignee: Nvidia CorporationInventors: Anurag Chaudhary, Christopher Richard Feilbach, Jasjit Singh, Manuel Gautho, Aprajith Thirumalai, Shailender Chaudhry
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Patent number: 11810308Abstract: Due to the factors such as lens distortion and camera misalignment, stereoscopic image pairs often contain vertical disparities. Introduced herein is a method and apparatus that determine and correct vertical disparities in stereoscopic image pairs using an optical flow map. Instead of discarding vertical motion vectors of the optical flow map, the introduced concept extracts and analyzes the vertical motion vectors from the optical flow map and vertically aligns the images using the vertical disparity determined from the vertical motion vectors. The introduced concept recognizes that although not apparent, vertical motion does exist in stereoscopic images and can be used to correct the vertical disparity in stereoscopic images.Type: GrantFiled: February 24, 2021Date of Patent: November 7, 2023Assignee: NVIDIA CorporationInventor: David Cook
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Patent number: 11806616Abstract: A game-agnostic event detector can be used to automatically identify game events. Game-specific configuration data can be used to specify types of pre-processing to be performed on media for a game session, as well as types of detectors to be used to detect events for the game. Event data for detected events can be written to an event log in a form that is both human- and process-readable. The event data can be used for various purposes, such as to generate highlight videos or provide player performance feedback.Type: GrantFiled: October 6, 2021Date of Patent: November 7, 2023Assignee: Nvidia CorporationInventors: Jonathan White, Dave Clark, Nathan Otterness, Travis Muhlestein, Prabindh Sundareson, Jim van Welzen, Jack van Welzen
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Patent number: 11801861Abstract: In various examples, systems and methods are disclosed that preserve rich, detail-centric information from a real-world image by augmenting the real-world image with simulated objects to train a machine learning model to detect objects in an input image. The machine learning model may be trained, in deployment, to detect objects and determine bounding shapes to encapsulate detected objects. The machine learning model may further be trained to determine the type of road object encountered, calculate hazard ratings, and calculate confidence percentages. In deployment, detection of a road object, determination of a corresponding bounding shape, identification of road object type, and/or calculation of a hazard rating by the machine learning model may be used as an aid for determining next steps regarding the surrounding environment—e.g., navigating around the road debris, driving over the road debris, or coming to a complete stop—in a variety of autonomous machine applications.Type: GrantFiled: January 15, 2021Date of Patent: October 31, 2023Assignee: NVIDIA CorporationInventors: Tae Eun Choe, Pengfei Hao, Xiaolin Lin, Minwoo Park
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Patent number: 11803759Abstract: Apparatuses, systems, and techniques are described to determine locations of objects using images including digital representations of those objects. In at least one embodiment, a gaze of one or more occupants of a vehicle is determined independently of a location of one or more sensors used to detect those occupants.Type: GrantFiled: October 11, 2021Date of Patent: October 31, 2023Assignee: Nvidia CorporationInventors: Feng Hu, Niranjan Avadhanam, Yuzhuo Ren, Sujay Yadawadkar, Sakthivel Sivaraman, Hairong Jiang, Siyue Wu