Abstract: A memory system and methods of operating the same that drastically increase the efficiency in memory use and allocation in graphics systems. In a graphics system using a tiled architecture, instead of pre-allocating a fixed amount of memory for each tile, the invention dynamically allocates varying amounts of memory per tile depending on the demand. In one embodiment all or a portion of the available memory is divided into smaller pages that are preferably equal in size. Memory allocation is done by page based on the amount of memory required for a given tile.

Abstract: A memory system and methods of operating the same that drastically increase the efficiency in memory use and allocation in graphics systems. In a graphics system using a tiled architecture, instead of pre-allocating a fixed amount of memory for each tile, the invention dynamically allocates varying amounts of memory per tile depending on the demand. In one embodiment all or a portion of the available memory is divided into smaller pages that are preferably equal in size. Memory allocation is done by page based on the amount of memory required for a given tile.

Abstract: A rendering pipeline system for a computer environment uses screen space tiling (SST) to eliminate the memory bandwidth bottleneck due to frame buffer access and performs screen space tiling efficiently, while avoiding the breaking up of primitives. The system also reduces the buffering size required by SST. High quality, full-scene anti-aliasing is easily achieved because only the on-chip multi-sample memory corresponding to a single tile of the screen is needed. The invention uses a double-z scheme that decouples the scan conversion/depth-buffer processing from the more general rasterization and shading processing through a scan/z engine. The scan/z engine externally appears as a fragment generator but internally resolves visibility and allows the rest of the rendering pipeline to perform setup for only visible primitives and shade only visible fragments.

Abstract: A method and apparatus for grouping texture data to increase storage throughput. Texels are addressed and stored according to adjacency to enable retrieval of a plurality of texels (a cache entry) with only a single address space request. Individual texel position is then derived using a simple adjacency formula. The preferred method and apparatus are compatible with both tiled data and linear data storage formats.

Abstract: Macrocells, e.g., Random Access Memory (“RAM”), are arranged in columns and disposed in a core of an integrated circuit (IC) chip. The macrocells can abut each other within the columns or can be separated from each other by standard cells which are disposed to fill gaps between the macrocells within the columns. Power/ground rails are disposed vertically along the sides of the columns. The power/ground rails run the full height of the core and couple to a power/ground ring disposed along the perimeter of the core. The power/ground rails also couple to the macrocells and the standard cells and provide power to those cells. The columns can form right angles with horizontal standard cell rows, thus enabling the standard cells to couple easily to the vertically disposed power/ground rails.

Abstract: A method and system are provided for efficiently implementing a dual finite impulse response (FIR) filter to vertically filter video data. A unique feedback mechanism enables multi-filter performance while implementing fewer actual filters and accompanying line delays than required in the available art. Advantageous placement of arithmetic elements is used to compensate for approximation error introduced by the feedback mechanism, resulting in substantially undiminished circuit performance in a more efficient circuit than currently available.

Abstract: A multiplayer game system is implemented over the WWW using a plurality of game servers dynamically linked to and controlled by a WWW server. The WWW server dynamically links game players who log on to a web site hosted by the WWW server as a function of game playing statistics for each game player which are stored in the WWW server. The game servers generate the game player statistics for each player during and/or after game play and upload the game player statistics to the WWW server. The WWW server matches game players to appropriate games currently being played on the game servers based on the skill level required by the game and the corresponding skill levels of other current players of that game as represented by the game player statistics stored by the WWW server and dynamically generates links for the game player to the appropriate games. The user can then select which game to play by choosing one of the dynamically generated links.