Patents Assigned to Oak-Mitsui, Inc.
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Patent number: 7862900Abstract: The invention concerns multilayered constructions useful in forming capacitors and resistors, which may be used in the manufacture of printed circuit boards and microelectronic devices. A thermosetting polymer layer or layers are attached directly onto a heat resistant film layer, specifically on the side(s) of the heat resistant film to be attached to an electrically conductive layer having an electrical resistance material layer thereon. Attaching the adhesive to the heat resistant film rather than the electrically conductive layer streamlines the manufacturing process, particularly in the formation of the electrical resistance material layer onto the electrically conductive layer. This also results in better precision and uniformity of the multilayered construction.Type: GrantFiled: August 26, 2009Date of Patent: January 4, 2011Assignee: Oak-Mitsui Inc.Inventors: John A. Andresakis, Pranabes K. Pramanik
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Patent number: 7672113Abstract: Polymer-ceramic composite materials for use in the formation of capacitors, which materials exhibit very low changes in temperature coefficient of capacitance (TCC) in response to changes in temperature within the range of from about ?55° C. to about 125° C. Specifically, these capacitor materials have a change in TCC ranging from about ?5% to about +5%, in response to changes in temperature within the desired temperature range. The inventive composite materials comprise a blend of a polymer component and ferroelectric ceramic particles, wherein the polymer component includes at least one epoxy-containing polymer, and at least one polymer having epoxy-reactive groups. The inventive polymer-ceramic composite materials have excellent mechanical properties such as improved peel strength and lack of brittleness, electrical properties such as high dielectric constant, and improved processing characteristics.Type: GrantFiled: September 14, 2007Date of Patent: March 2, 2010Assignee: Oak-Mitsui, Inc.Inventors: Pranabes K. Pramanik, Jaclyn Radewitz, Kazuhiro Yamazaki
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Patent number: 7596842Abstract: The invention concerns a method of making multilayered constructions useful in forming capacitors and resistors, which may be used in the manufacture of printed circuit boards and microelectronic devices. According to the inventive method, a thermosetting polymer layer or layers are attached directly onto a heat resistant film layer, specifically on the side(s) of the heat resistant film to be attached to an electrically conductive layer having an electrical resistance material layer thereon. Attaching the adhesive to the heat resistant film rather than the electrically conductive layer streamlines the manufacturing process, particularly in the formation of the electrical resistance material layer onto the electrically conductive layer. This also results in better precision and uniformity of the multilayered construction.Type: GrantFiled: February 22, 2005Date of Patent: October 6, 2009Assignee: Oak-Mitsui Inc.Inventors: John A. Andresakis, Pranabes K. Pramanik
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Patent number: 7413815Abstract: The invention concerns multilayered structures useful for forming capacitors, which may be embedded within printed circuit boards or other microelectronic devices. The multilayered structure comprises a pair of parallel electrically conductive layers separated by a pair of dielectric layers and a central polymerizable layer. Each of the dielectric layers and the central layer may include a filler. Capacitors formed from the multilayered structures of the invention exhibit excellent short circuit resistance as well as excellent void resistance.Type: GrantFiled: February 19, 2004Date of Patent: August 19, 2008Assignee: Oak-Mitsui Inc.Inventor: Pranabes K. Pramanik
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Patent number: 7192654Abstract: The invention concerns multilayered constructions useful for forming resistors and capacitors, for the manufacture of printed circuit boards or other microelectronic devices. The multilayered constructions comprise sequentially attached layers comprising: a first electrically conductive layer, a first thermosetting polymer layer, a heat resistant film layer, a second thermosetting polymer layer, and a nickel-phosphorus electrical resistance material layer electroplated onto a second electrically conductive layer.Type: GrantFiled: February 22, 2005Date of Patent: March 20, 2007Assignees: Oak-Mitsui Inc., Ohmega Technologies Inc.Inventors: John A. Andresakis, Pranabes K. Pramanik, Bruce Mahler, Daniel Brandler
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Patent number: 6763575Abstract: A process for forming printed circuit boards having integral inductor cores. According to the invention, a thin nickel layer is formed on a copper foil. The copper foil structure is then laminated to a substrate such that the nickel layer is in contact with the substrate. The copper foil is removed, leaving the nickel layer on the substrate. Using photomechanical imaging and etching techniques known in the art, NiFe is plated and patterned directly on the nickel layer, thereby forming integral inductor cores of the substrate. This process of the present invention allows for the elimination of several steps used in known processes, while also reducing etch time and minimizing waste of NiFe.Type: GrantFiled: June 11, 2001Date of Patent: July 20, 2004Assignee: Oak-Mitsui Inc.Inventors: Jonathan Meigs, Wendy Herrick
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Publication number: 20040075528Abstract: A printed circuit heater and process for forming a printed circuit heater are described. The printed circuit heater is formed by depositing a thin metal layer onto a surface of a metal carrier foil, forming a composite. The thin metal layer has a thickness of about 0.1 &mgr;m to about 2 &mgr;m. The composite is attached to a substrate such that the thin metal layer is in contact with the substrate, forming a laminate. At least a portion of the metal carrier foil is selectively removed from portions of the laminate. The thin metal layer is patterned and etched such that the etched thin metal layer has a heat density of from about 0.5 watts/in2 to about 20 watts/in2 at working voltages from about 3 volts to about 600 volts. The remaining portions of the metal carrier foil, if any, can be selectively removed to thereby provide low resistance busses within the circuit, thus eliminating the need for multiple external connections, and to facilitate evenness of heat distribution.Type: ApplicationFiled: October 22, 2002Publication date: April 22, 2004Applicant: OAK-MITSUI, Inc.Inventors: Derek C. Carbin, Jeffrey T. Gray, John A. Andresakis
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Patent number: 6657849Abstract: A capacitor, which has a pair of conductive foils each having a dielectric layer on its surface, wherein the dielectric layers are attached to one another. In one process for its production, a capacitor is formed by applying a first dielectric layer onto a surface of a first conductive foil; applying a second dielectric layer onto a surface of a second conductive foil; and then attaching the first and second dielectric layers to one another. The resulting capacitor exhibits excellent void resistance.Type: GrantFiled: August 24, 2000Date of Patent: December 2, 2003Assignee: Oak-Mitsui, Inc.Inventors: John A. Andresakis, Edward C. Skorupski, Scott Zimmerman, Gordon Smith
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Patent number: 6629348Abstract: The invention relates to the manufacture of printed circuit boards having improved interlayer adhesion. More particularly, the present invention pertains to adhesiveless printed circuit boards having excellent thermal performance and useful for producing high-density circuits. A metal foil is laminated to an etched surface of a polyimide substrate having a polyimide film thereon. Etching the substrate surface allows for strong adhesion of a pure polyimide film to the substrate.Type: GrantFiled: May 1, 2001Date of Patent: October 7, 2003Assignee: Oak-Mitsui, Inc.Inventors: Edward C. Skorupski, Jeffrey T. Gray, John A. Andresakis, Wendy Herrick
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Patent number: 6610417Abstract: The invention relates to the manufacture of metal foil electrodes useful in the manufacture of printed circuit boards having passive circuit components such as capacitors, resistors or inductors configured in a planar orientation. A copper foil is coated on each opposite side with a thin layer of nickel, which increases the range of functionality of the foil.Type: GrantFiled: October 4, 2001Date of Patent: August 26, 2003Assignee: Oak-Mitsui, Inc.Inventors: John A. Andresakis, Edward Skorupski, Wendy Herrick, Michael D. Woodry
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Patent number: 6606792Abstract: A process for forming printed circuit substrates incorporating impedance elements in which a pattern of impedance elements and a conductor pattern are incorporated on an insulating support. The process involves depositing a layer of an impedance material on a first surface of a sheet of an electrically highly conductive material and attaching a second surface of the sheet of highly conductive material to a support. Then one applies a layer of a photoresist material onto the layer of impedance material with imagewise exposure and development. After etching away the portion of the impedance layer material underlying the removed nonimage areas of the photoresist material, a pattern of impedance elements remain on the sheet of highly conductive material. Thus printed circuit board with impedance elements can be manufactured to a high degree of electrical tolerance.Type: GrantFiled: May 25, 2000Date of Patent: August 19, 2003Assignee: Oak-Mitsui, Inc.Inventor: John A. Andresakis
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Patent number: 6500349Abstract: A continuous process for forming multilayer circuit structures which includes applying and curing a film forming polymer onto the matte side of a copper foil. The opposite (shiny) side of the foil is optionally but preferably cleaned, and applied with a photoresist which is then optionally but preferably dried. The photoresist is exposed, and developed to remove the nonimage areas but leave the image areas. The foil under the removed nonimage area is then etched to form a copper pattern, and the remaining photoresist is optionally but preferably removed. The foil is then cut into sections, and then optionally but preferably punched with registration holes. The copper pattern is then optionally but preferably treated with a bond enhancing treatment, optionally but preferably inspected for defects, and laminated onto a substrate to form a multilayered circuit structure.Type: GrantFiled: December 26, 2000Date of Patent: December 31, 2002Assignee: Oak-Mitsui, Inc.Inventors: John Andresakis, Dave Paturel
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Publication number: 20020196119Abstract: A process for forming printed circuit boards having integral inductor cores. According to the invention, a thin nickel layer is formed on a copper foil. The copper foil structure is then laminated to a substrate such that the nickel layer is in contact with the substrate. The copper foil is removed, leaving the nickel layer on the substrate. Using photomechanical imaging and etching techniques known in the art, NiFe is plated and patterned directly on the nickel layer, thereby forming integral inductor cores of the substrate. This process of the present invention allows for the elimination of several steps used in known processes, while also reducing etch time and minimizing waste of NiFe.Type: ApplicationFiled: June 11, 2001Publication date: December 26, 2002Applicant: OAK-MITSUI, Inc.Inventors: Jonathan Meigs, Wendy Herrick
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Patent number: 6495244Abstract: This invention relates to printed circuit boards having improved fire resistance and improved environmental stability. The invention provides halogen-free fire retardant printed circuit boards incorporating potentially flammable polymers. Flame resistant thermoplastic layers prevent combustion of thermosetting polymers, as well as adding strength to the laminate, resulting in a less brittle thin core than the prior art. The flame resistant circuit board is cost efficient, environmentally safe and has excellent properties, including a decreased probability of shorting, good dielectric breakdown voltage, a smooth surface and good electrical/thermal performance.Type: GrantFiled: September 7, 2000Date of Patent: December 17, 2002Assignee: Oak-Mitsui, Inc.Inventors: John A. Andresakis, Dave Paturel
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Publication number: 20020162218Abstract: The invention relates to the manufacture of printed circuit boards having improved interlayer adhesion. More particularly, the present invention pertains to adhesiveless printed circuit boards having excellent thermal performance and useful for producing high-density circuits. A metal foil is laminated to an etched surface of a polyimide substrate having a polyimide film thereon. Etching the substrate surface allows for strong adhesion of a pure polyimide film to the substrate.Type: ApplicationFiled: May 1, 2001Publication date: November 7, 2002Applicant: OAK-MITSUI, Inc.Inventors: Edward C. Skorupski, Jeffrey T. Gray, John A. Andresakis, Wendy Herrick
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Publication number: 20020079288Abstract: A continuous process for forming multilayer circuit structures which includes applying and curing a film forming polymer onto the matte side of a copper foil. The opposite (shiny) side of the foil is optionally but preferably cleaned, and applied with a photoresist which is then optionally but preferably dried. The photoresist is exposed, and developed to remove the nonimage areas but leave the image areas. The foil under the removed nonimage area is then etched to form a copper pattern, and the remaining photoresist is optionally but preferably removed. The foil is then cut into sections, and then optionally but preferably punched with registration holes. The copper pattern is then optionally but preferably treated with a bond enhancing treatment, optionally but preferably inspected for defects, and laminated onto a substrate to form a multilayered circuit structure.Type: ApplicationFiled: December 26, 2000Publication date: June 27, 2002Applicant: OAK-MITSUI, Inc.Inventors: John Andresakis, Dave Paturel
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Patent number: 5679230Abstract: A electrolytically deposited copper foil has a roughening treatment of copper on the shiny side and on the matte side a fine nodular metal deposit preferably copper or a copper alloy which improves adhesion to a substrate, but is insufficient to increase the measured surface roughness Rz.Type: GrantFiled: August 21, 1995Date of Patent: October 21, 1997Assignee: Oak-Mitsui, Inc.Inventors: John Francis Fatcheric, Derek Charles Carbin