Abstract: A system-on-a-chip controller having a first processor and a second processor. The first processor provides control processing and image processing. The second processor provides image processing. The processors receive data from an external source through a data bus. Also, the controller can include a third controller to provide I/O functionality to an external device. The second processor processes the stored data in either a row or column configuration. A fixed-length instruction word can be decoded into two instructions, an operation instruction and an I/O instruction, and can be used to process the data. The I/O instruction can be disposed in an unused bit field of the operation instruction.