Abstract: A method of designing a circuit is described. In an embodiment, a physical design implementation for the circuit is created using a plurality of entities. These entities are named “genomes”. Each entity includes a portion of a functional description of the circuit that has been synthesized into a gate-level implementation. An entity is selected to facilitate the physical design implementation meeting a plurality of design constraints. Several steps (e.g., beginning with selection of an entity) of this method are repeated several times to meet the design constraints. As a consequence, the physical design implementation provides more accurate information for use in a final physical design implementation. Moreover, the physical design implementation can be created faster than prior techniques while still allowing a global view of the physical design implementation in meeting design constraints.

Abstract: A method of designing a circuit is described. In an embodiment, a physical design implementation for the circuit is created using a plurality of entities. These entities are named “genomes”. Each entity includes a portion of a functional description of the circuit that has been synthesized into a gate-level implementation. An entity is selected to facilitate the physical design implementation meeting a plurality of design constraints. Several steps (e.g., beginning with selection of an entity) of this method are repeated several times to meet the design constraints. As a consequence, the physical design implementation provides more accurate information for use in a final physical design implementation. Moreover, the physical design implementation can be created faster than prior techniques while still allowing a global view of the physical design implementation in meeting design constraints.

Abstract: A method of designing a circuit is described. In an embodiment, a physical design implementation for the circuit is created using a plurality of entities. These entities are named “genomes”. Each entity includes a portion of a functional description of the circuit that has been synthesized into a gate-level implementation. An entity is selected to facilitate the physical design implementation meeting a plurality of design constraints. Several steps (e.g., beginning with selection of an entity) of this method are repeated several times to meet the design constraints. As a consequence, the physical design implementation provides more accurate information for use in a final physical design implementation. Moreover, the physical design implementation can be created faster than prior techniques while still allowing a global view of the physical design implementation in meeting design constraints.

Abstract: A method of designing a circuit is described. In an embodiment, a physical design implementation for the circuit is created using a plurality of entities. These entities are named “genomes”. Each entity includes a portion of a functional description of the circuit that has been synthesized into a gate-level implementation. An entity is selected to facilitate the physical design implementation meeting a plurality of design constraints. Several steps (e.g., beginning with selection of an entity) of this method are repeated several times to meet the design constraints. As a consequence, the physical design implementation provides more accurate information for use in a final physical design implementation. Moreover, the physical design implementation can be created faster than prior techniques while still allowing a global view of the physical design implementation in meeting design constraints.