Abstract: A solid-state mass storage device adapted to be used as a cache for an hard disk drive that utilizes a more efficient logical data management method relative to conventional systems. The storage device includes a circuit board, a memory controller, at least one non-volatile memory device, and at least two data interfaces. The storage device is coupled to a host computer system and configured to operate as a cache for at least one hard disk drive. The storage device is interposed between the host computer system and the at least one hard disk drive. Both the storage device and the at least one hard disk drive are coupled to the host computer system through a single connection and configured to operate in a daisy chain configuration.

Abstract: A host server computer system that includes a hypervisor within a virtual space architecture running at least one virtualization, acceleration and management server and at least one virtual machine, at least one virtual disk that is read from and written to by the virtual machine, a cache agent residing in the virtual machine, wherein the cache agent intercepts read or write commands made by the virtual machine to the virtual disk, and a solid state drive. The solid state drive includes a non-volatile memory storage device, a cache device and a memory device driver providing a cache primitives application programming interface to the cache agent and a control interface to the virtualization, acceleration and management server.

Abstract: Non-volatile solid state mass storage device and methods for improving write performance thereof. The storage device includes a NAND flash controller, an array of NAND flash memory integrated circuits, and means for determining a lowest unused page number of each write target block in a group of the NAND flash memory integrated circuits that are simultaneously accessible at any given time by a write command. The storage device has further means for programming a dummy write to at least a first write target block in a first NAND flash memory integrated circuit within the group of NAND flash memory integrated circuits if the lowest unused page number within the first write target block is lower than the lowest unused page number of a second write target block in a second NAND flash memory integrated circuit in the group of NAND flash memory integrated circuits.

Abstract: A volatile memory-based solid-state mass storage device adapted for use in a host system as a storage tier. The storage device includes a substrate on which is mounted a system interface, a control circuitry, and a plurality of substantially identical random access memory components that define at least one memory array. Each memory component of the memory array has associated therewith an input/output path, a width of the input/output path, and a burst length. The storage device is connected to the host system and uses parity information to provide redundancy data sufficient to correct a catastrophic failure of one of the memory components. The number of correctable bits to correct the catastrophic failure of one of the memory components equals the product of the width of the input/output path thereof and the burst length thereof.

Abstract: Memory technology adapted to store data in a binary format. Such technology includes a semiconductor memory device having memory cells, each having a substrate and at least three graphene layers that are oriented to define a graphene stack disposed in a plane. The graphene stack of each memory cell is connected to a bit line and to a ground connection so that a conductive path is defined in the plane of the graphene stack.

Abstract: A solid-state mass storage device for use with host computer systems, and methods of increasing the endurance of non-volatile memory components thereof that define a first non-volatile memory space. The mass storage device further has a second non-volatile memory space containing at least one non-volatile memory component having a higher write endurance than the memory components of the first non-volatile memory space. The second non-volatile memory space functions as a low-pass filter for host writes to the first non-volatile memory space to minimize read accesses to the first non-volatile memory space. Contents of the second non-volatile memory space are managed using a change counter.

Abstract: A solid state drive having at least one NAND flash memory component organized in blocks, pages and cells. Each cell is adapted to store at least two bits. Each block of the memory component is adapted to be dynamically configured to store at least one bit per cell using a first mode of operation and dynamically configured to store at least two bits per cell using a second mode of operation while the mass storage device is operating, wherein the first mode of operation entails programming fewer bits of a cell in fewer passes as compared to the second mode of operation.

Abstract: Systems and methods for maintaining cache synchronization in network of cross-host multi-hypervisor systems, wherein each host has least one virtual server in communication with a virtual disk, an adaptation layer, a cache layer governing a cache and a virtualization and acceleration server to manage volume snapshot, volume replication and synchronization services across the different host sites.

Abstract: Mass storage devices and methods that use at least one non-volatile solid-state memory device, for example, one or more NAND flash memory devices, that defines a memory space for permanent storage of data. The mass storage device is adapted to be operatively connected to a host computer system having an operating system and a file system. The memory device includes memory cells organized in pages that are organized into memory blocks for storing data, and a page buffer partitioned into segments corresponding to a cluster size of the operating system or the file system of the host computer system. The size of a segment of the page buffer is larger than the size of any page of the memory device. The page buffer enables logically reordering multiple clusters of data fetched into the segments from pages of memory device and write-combining segments containing valid clusters.

Abstract: A non-volatile solid state memory-based mass storage device having at least one non-volatile memory component and methods of operating the storage device. In one aspect of the invention, the one or more memory components define a memory space partitioned into user memory and over-provisioning pools based on a P/E cycle count stored in a block information record. The storage device transfers the P/E cycle count of erased blocks to a host and the host stores the P/E cycle count in a content addressable memory. During a host write to the storage device, the host issues a low P/E cycle count number as a primary address to the content addressable memory, which returns available block addresses of blocks within the over-provisioning pool as a first dimension in a multidimensional address space. Changed files are preferably updated in append mode and the previous version can be maintained for version control.

Abstract: Non-volatile solid-state memory-based storage devices and methods of operating the storage devices to have low initial error rates. The storage devices and methods use bit error rate comparison of duplicate writes to one or more non-volatile memory devices. The data set with a lower bit error rate as determined during verification is maintained, whereas data sets with higher bit error rates are discarded. A threshold of bit error rates can be used to trigger the duplication of data for bit error comparison.

Abstract: Power supply systems and methods for their use in computer systems. The systems and methods make use of a power supply unit to which a main power cable and multiple cable stubs are electrically connected. The power cable is adapted to provide power to a motherboard of a computer system, and the multiple cable stubs are adapted to provide power to peripheral devices within the computer system. At least two of the cable stubs have different lengths. Each of the cable stubs has a device-specific female connector configured to mate with a specific class of the peripheral devices. The power supply system further includes at least one extension cable adapted to connect to the device-specific female connector of at least one of the cable stubs to allow extension of the cable stub or to power more than one of the peripheral devices.

Abstract: A method and mass storage device that combine multiple solid state drives (SSDs) to a single volume. The device includes a carrier board and at least two solid state drives having power and data connections to the carrier board. The carrier board includes a circuit board functionally connected to a control logic and at least two secondary connectors that are disposed at different edges of the circuit board and functionally connected to the control logic. The solid state drives are connected to the carrier board through the secondary connectors, and each solid state drive has a power and data connector directly connected to one of the secondary connectors of the carrier board. The solid state drives are oriented substantially parallel to the carrier board and to each other.

Abstract: A solid state memory-based mass storage device and a method of transferring data between a memory controller and at least one memory device of the mass storage device through optical input/output links that transmit multiplexed optical data signals between the memory device and controller.

Abstract: A mounting structure adapted for mounting an expansion card within a computer enclosure and configured to directly absorb and conduct heat from a heat source (such as an IC chip) on the card to the ambient atmosphere surrounding the enclosure. The mounting structure includes a mounting bracket, a heat sink adapted to contact a surface of the heat source on the expansion card, an extension interconnecting the heat sink and the mounting bracket, one or more features for conducting heat from the heat sink to the mounting bracket, and one or more features associated with the mounting bracket for dissipating heat from the mounting structure to the ambient atmosphere surrounding the enclosure.

Abstract: A solid state drive having a non-volatile memory device and methods of operating the solid state drive to compare existing data stored on the memory device to subsequent data in an incoming data stream received by the solid state drive from a host system. If matching data are found, the solid state drive uses the existing data instead of writing the subsequent data to the memory device. Common data patterns can be shared among different files stored on the memory device.

Abstract: Solid-state mass storage devices, host computer systems, and methods of increasing the endurance of non-volatile solid-state memory components used therein. The memory components comprise memory cells organized in functional units that are adapted to receive units of data transferred from the host computer system and correspond to the functional units of the memory component. The level of programming for each cell is reduced by performing an analysis of the bit values of the units of data to be written to at least a first of the functional units of the memory component. Depending on the analysis of “0” and “1” bit values of the units of data to be written, the bit values are inverted before writing the units of data to the first memory component.

Abstract: A system and method for monitoring power consumption of a computer system component, such as a central processing unit (CPU), of a desktop computer system. The component is supplied with supply power from a power supply unit of the computer through a power supply cable. A coupling is disposed between the power supply unit and a substrate (e.g., motherboard) on which the component is mounted, and is electrically connected to at least one power supply line of the power supply cable and a power supply connector on the substrate. The power supply line carries a supply voltage. The current flow through the power supply line is determined, a power consumption reading for the component is generated based on the supply voltage and the current flow through the power supply line, and the supply voltage on the power supply line is modulated to determine a lowest current flow therethrough.

Abstract: A mass storage system comprising multiple memory cards, each with non-volatile memory components, a system bus interface for communicating with a system bus of a host system, and at least one ancillary interface. The ancillary interface is configured for direct communication of commands, addresses and data between the memory cards via a cross-link connector without accessing the system bus interface.

Abstract: A solid state drive that uses over-provisioning of NAND flash memory blocks as part of housekeeping functionality, including deduplication and coalescence of data for efficient usage of NAND flash memory devices and maintaining sufficient numbers of erased blocks to promote write performance.