Abstract: In a dual cathode magnetron, an adjustment circuit is provided between a pair of sputter targets having a coaxial (preferably frusto-conical) relationship to modify the distribution of ion and electron currents flowing from the plasma discharge to a substrate residing within a sputter chamber. A stress adjustment circuit is used to modify the ion bombardment of the growing films on the substrate resulting in a mechanism for control of the stress in the deposited films. In a preferred embodiment, the adjustment circuit comprises a variable resistor disposed between an internal shield that acts as a passive anode and a target. The value of the variable resistor influences the plasma discharge current distribution between the split sputter targets and the internal shields, and can effectively be used to adjust the properties of the deposited films.

Abstract: A solution for producing nanoscale thickness resistor films with sheet resistances above 1000?/? (ohm per square) and low temperature coefficients of resistance (TCR) from ?50 ppm/° C. to near zero is disclosed. In a preferred embodiment, a silicon-chromium based compound material (cermet) is sputter deposited onto a substrate at elevated temperature with applied rf substrate bias. The substrate is then exposed to a process including exposure to a first in-situ anneal under vacuum, followed by exposure to air, and followed then by exposure to a second anneal under vacuum. This approach results in films that have thermally stable resistance properties and desirable TCR characteristics.

Abstract: The present invention relates generally to semiconductor fabrication and particularly to fabricating magnetic tunnel junction devices. In particular, this invention relates to a method for using the dielectric layer in tunnel junctions as an etch stop layer to eliminate electrical shorting that can result from the patterning process.