Abstract: A method for depositing one or more polycrystalline silicon layers (230c) on a substrate (210) by a chemical vapor deposition in a reactor, includes adjusting a deposition temperature between 605° C.-800° C. in a process chamber of the reactor, and depositing the one or more polycrystalline silicon layers on the substrate by using a silicon source gas including SiH4 or SiH2Cl2, and a dopant gas including BCl3.

Abstract: The application relates to a high-resistivity silicon substrate (100) with a reduced radio frequency loss for a radio frequency integrated passive device. The substrate comprising a bulk zone (110) comprising high-resistivity bulk silicon and a preserved sub-surface lattice damage zone (120b) comprising fractured silicon above the bulk zone. The lattice damage zone is processed into the substrate and the preserved lattice damage zone is configured to achieve the RF loss reduction of the substrate by suppressing a parasitic surface conduction.

Abstract: A method for depositing one or more polycrystalline silicon layers (230c) on a substrate (210) by a chemical vapour deposition in a reactor, includes adjusting a deposition temperature between 605° C.-800° C. in a process chamber of the reactor, and depositing the one or more polycrystalline silicon layers on the substrate by using a silicon source gas including SiH4 or SiH2Cl2, and a dopant gas including BCl3.

Abstract: An implementation of a Czochralski-type crystal growth has been shown and embodied. More particularly, a furnace with suitable insulation and flow arrangement is shown to improve the cost-efficiency of production of crystals. That is achieved by the shown new hot-zone structure, gas flows and the growth process which can decrease the power consumption, increase the lifetime of hot-zone parts and improve the productivity, e.g., by giving means for opening the hot-zone and easily adapting the hot-zone to a new crystal diameter.

Abstract: An implementation of a Czochralski-type crystal growth has been shown and embodied. More particularly, a furnace with suitable insulation and flow arrangement is shown to improve the cost-efficiency of production of crystals. That is achieved by the shown new hot-zone structure, gas flows and the growth process which can decrease the power consumption, increase the lifetime of hot-zone parts and improve the productivity, e.g., by giving means for opening the hot-zone and easily adapting the hot-zone to a new crystal diameter.

Abstract: It is shown in the invention a method for manufacturing a semiconductor wafer structure with an active layer for impurity removal, which method comprises phases of depositing a first layer on a first wafer surface for providing an active layer, an optional phase of preparation for said first layer for next phase, growing thermal oxide layer on a second wafer, bonding said first and second wafers into a stack, annealing the stack for a crystalline formation in said thermal oxide layer as a second layer, and thinning said first wafer to a pre-determined thickness. The invention concerns also a wafer manufactured according to the method, chip that utilizes such a wafer structure and an electronic device utilizing such a chip.

Abstract: A new clean CVD growing process of dopant doped silicon layers comprising epitaxial silicon or polycrystalline silicon, has been developed. The process is occurring advantageously at a high growing temperature of 600-1250° C., having a phase in which silicon comprised halide is used as a silicon source gas with a dopant.

Abstract: An implementation of a Czochralski-type crystal growth has been shown and embodied. More particularly, a furnace with suitable insulation and flow arrangement is shown to improve the cost-efficiency of production of crystals. That is achieved by the shown new hot-zone structure, gas flows and the growth process which can decrease the power consumption, increase the lifetime of hot-zone parts and improve the productivity, e.g., by giving means for opening the hot-zone and easily adapting the hot-zone to a new crystal diameter.

Abstract: It is shown in the invention a method for manufacturing a semiconductor wafer structure with an active layer for impurity removal, which method comprises phases of depositing a first layer on a first wafer surface for providing an active layer, an optional phase of preparation for said first layer for next phase, growing thermal oxide layer on a second wafer, bonding said first and second wafers into a stack, annealing the stack for a crystalline formation in said thermal oxide layer as a second layer, and thinning said first wafer to a pre-determined thickness. The invention concerns also a wafer manufactured according to the method, chip that utilizes such a wafer structure and an electronic device utilizing such a chip.

Abstract: A method and a device to grow from the vapor phase, a single crystal of either SiC, a group III-nitride, or alloys thereof, at a growth rate and for a period of time sufficient to produce a crystal of preferably several centimeters length. The diameter of the growing crystal may be controlled. To prevent the formation of undesirable polycrystalline deposits on surfaces in the downstream vicinity of the single crystal growth area, the local supersaturation of at least one component of the material grown is lowered by introducing a separate gas flow comprising at least one halogen element or a combination of said halogen and hydrogen species.