Abstract: A method operates within an integrated circuit having a plurality of processing lanes. For each of a first and second processing lanes, the method determines a number of packed data words among one or more packed data words associated with the respective processing lane, associates the number of packed data words with a used field of the processing lane, wherein the used field indicates the number of packed data words in the processing lane; and stores the one or more packed data words in a variable record length memory based, at least in part, on the used field of the processing lane.
Type:
Grant
Filed:
May 27, 2017
Date of Patent:
November 17, 2020
Assignee:
OL Security Limited Liability
Inventors:
Ujval J. Kapasi, Amit Gulati, John Sievers, Yipeng Liu, Dan Miller