Abstract: A product and method for packaging high power integrated circuits or infrared emitter arrays for operation through a wide range of temperatures, including cryogenic operation. The present invention addresses key limitations with the prior art, by providing temperature control through direct thermal conduction or active fluid flow and avoiding thermally induced stress on the integrated circuits or emitter arrays. The present invention allows for scaling of emitter arrays up to extremely large formats, which is not viable under the prior art. The present invention eliminates or otherwise reduces risks associated with vaporization of coolant within the heatsink structure.

Abstract: A product and method for packaging high power integrated circuits or infrared emitter arrays for operation through a wide range of temperatures, including cryogenic operation. The present invention addresses key limitations with the prior art, by providing temperature control through direct thermal conduction or active fluid flow and avoiding thermally induced stress on the integrated circuits or emitter arrays. The present invention allows for scaling of emitter arrays up to extremely large formats, which is not viable under the prior art.

Abstract: A product and method for packaging high power integrated circuits or infrared emitter arrays for operation through a wide range of temperatures, including cryogenic operation. The present invention addresses key limitations with the prior art, by providing temperature control through direct thermal conduction or active fluid flow and avoiding thermally induced stress on the integrated circuits or emitter arrays. The present invention allows for scaling of emitter arrays up to extremely large formats, which is not viable under the prior art.