Abstract: A floorplan-optimized stacked image sensor and a method for designing the sensor are disclosed. A sensor layer includes multiple PSAs partitioned into PSA groups. A circuit layer includes multiple analog-to-digital converters each communicatively coupled to a different PSA. Each analog-to-digital converter (ADC) is semi-aligned to the PSA group associated with the PSA to which it is communicatively coupled. The floorplan of ADCs maximizes contiguous global-based space on the circuit layer uninterrupted by an ADC. The resulting circuit layer floorplan has one or more global-based spaces interleaved with one or more local-based spaces containing ADCs.

Abstract: A complementary metal oxide semiconductor (CMOS) image sensor with peninsular ground contacts includes (a) a substrate having a plurality of pixel units arranged in rows of pixel units and (b) a plurality of ground contacts for grounding the pixel units, wherein the ground contacts are formed in respective peninsular regions of the substrate within respective ones of the pixel units, and wherein each of the peninsular regions is only partly enclosed by a shallow trench isolation and the peninsular regions have alternating orientation along each of the rows of pixel units.

Abstract: A chip-scale image sensor packaging method with black masking includes (a) cutting a composite wafer having a plurality of image sensors bonded to a common glass substrate to form slots in the common glass substrate, wherein the slots define a cover glass for each of the image sensors, respectively, (b) forming black mask in the slots such that the black mask, for each of the image sensors, spans perimeter of the cover glass as viewed cross-sectionally along optical axis of the image sensors, and (c) dicing through the black mask in the slots to singulate a plurality of chip-scale packaged image sensors each including one of the image sensors and the cover glass bonded thereto, with sides of the cover glass facing away from the optical axis being at least partly covered by the black mask.

Abstract: A system and method for high dynamic range (HDR) imaging includes writing a first, second, and third sub-frame to a memory at a first, second, and third readout time, respectively, the first, second, and third sub-frame being generated by a same first sub-array of the array of image pixels. Subsequent to the third readout time, the first, second, and third sub-frames are sent to an image signal processor. Also subsequent to the third readout time, a fourth sub-frame is sent to the image sensor. The fourth sub-frame is generated by the same first sub-array of the array of image pixels. The fourth sub-frame bypasses the memory by being sent from an analog-to-digital converter to the image signal processor without being written to the memory.

Abstract: A 360 degree camera system includes a support structure, a plurality of image capture devices, a plurality of lens systems, and an image processing system. The image capture devices are positioned such that their height is greater than their width. The image processing system includes a rotation module for remapping the pixel addresses of the image data to join the captured images along their long edges.

Abstract: A system for obtaining image depth information for at least one object in a scene includes (a) an imaging objective having a first portion for forming a first optical image of the scene, and a second portion for forming a second optical image of the scene, the first portion being different from the second portion, (b) an image sensor for capturing the first and second optical images and generating respective first and second electronic images therefrom, and (c) a processing module for processing the first and second electronic images to determine the depth information. A method for obtaining image depth information for at least one object in a scene includes forming first and second images of the scene, using respective first and second portions of an imaging objective, on a single image sensor, and determining the depth information from a spatial shift between the first and second images.

Abstract: An imaging system with single-photon-avalanche-diodes (SPADs) and sensor translation for capturing a plurality of first images to enable generation of an enhanced-resolution image includes (a) an image sensor with SPAD pixels for capturing the plurality of first images at a plurality of spatially shifted positions of the image sensor, respectively, and (b) an actuator for translating the image sensor, parallel to its light receiving surface, to place the image sensor at the plurality of spatially shifted positions. A method for capturing a plurality of first images that enable composition of an enhanced-resolution image includes (a) translating an image sensor parallel to its light receiving surface to place the image sensor at a plurality of spatially shifted positions, and (b) capturing, using SPAD pixels implemented in pixel array of the image sensor, the plurality of first images at the plurality of spatially shifted positions, respectively.

Abstract: An optical assembly includes an image sensor, a lens module disposed over the image sensor in a first direction, a transparent glue layer, and a transparent dry adhesive layer formed of a different material than the transparent glue layer. Each of the transparent glue layer and the transparent dry adhesive layer are disposed between the image sensor and the lens module in the first direction. Each of the transparent glue layer and the transparent dry adhesive layer are optically coupled in series with the image sensor and the lens module. A method for forming an optical assembly includes joining an image sensor and a lens module using a transparent glue layer and a transparent dry adhesive layer formed of a different material than the transparent glue layer.

Abstract: A pixel array includes a plurality of visible light pixels arranged in the pixel array. Each one of the plurality of visible light pixels includes a photosensitive element arranged in a first semiconductor die to detect visible light. Each one of the plurality of visible light pixels is coupled to provide color image data to visible light readout circuitry disposed in a second semiconductor die stacked with and coupled to the first semiconductor die in a stacked chip scheme. A plurality of infrared (IR) pixels arranged in the pixel array. Each one of the plurality of IR pixels includes a single photon avalanche photodiode (SPAD) arranged in the first semiconductor die to detect IR light. Each one of the plurality of visible light pixels is coupled to provide IR image data to IR light readout circuitry disposed in the second semiconductor die.

Abstract: An image sensor package includes an image sensor with a pixel array disposed in a semiconductor material, and a transparent shield adhered to the semiconductor material. The pixel array is disposed between the semiconductor material and the transparent shield. A light blocking layer is disposed in recessed regions of the transparent shield, and the recessed regions are disposed on an illuminated side of the transparent shield. The light blocking layer is disposed to prevent light from reflecting off edges of the transparent shield into the image sensor.

Abstract: An interface circuit includes a pre-driver that converts the single-ended signal to an intermediate differential signal having a first voltage swing responsive to a first supply voltage supplied to the pre-driver. An output driver is coupled to receive the intermediate differential signal from the pre-driver to convert the intermediate differential signal to an output differential signal coupled to be received by a load coupled to the output driver. The output differential signal has a second voltage swing responsive to a second supply voltage supplied to the output driver. An internal regulator is coupled to receive a variable supply voltage to supply the second voltage to the output driver. The second supply voltage is generated in response to a bias signal. A replica bias circuit is coupled to receive the variable supply voltage to generate the bias signal.

Abstract: An image sensor pixel for use in a high dynamic range image sensor includes a first photodiode and a second photodiode. The first photodiode include a first doped region, a first lightly doped region, and a first highly doped region disposed between the first doped region and the first lightly doped region. The second photodiode disposed in has a second full well capacity substantially equal to a first full well capacity of the first photodiode. The second photodiode includes a second doped region, a second lightly doped region, and a second highly doped region disposed between the second doped region and the second lightly doped region. A first aperture sizer is disposed above the second photodiode to limit image light received by the second photodiode to a second amount that is less than a first amount of image light received by the first photodiode.

Abstract: A method for combining images includes capturing a first image including a subject from a first camera. A second image is captured from a second camera and the second image includes the subject. First pre-processing functions are applied on the first image to produce a first processed image. The first pre-processing functions include applying a distortion component of a rotation matrix to the first image. The rotation matrix defines a corrected relationship between the first and the second image. Second pre-processing functions are applied on the second image to produces a second processed image. The second pre-processing functions include applying the rotation matrix to the second image. The first processed image and the second processed image are blended in a processing unit to form a composite image.

Abstract: An image sensor includes first and second pluralities of photodiodes interspersed among each other in a semiconductor substrate. Incident light is to be directed through a surface of the semiconductor substrate into the first and second pluralities of photodiodes. The first plurality of photodiodes has greater sensitivity to the incident light than the second plurality of photodiodes. A metal film layer is disposed over the surface of the semiconductor substrate over the second plurality of photodiodes and not over the first plurality of photodiodes. A metal grid is disposed over the surface of the semiconductor substrate, and includes a first plurality of openings through which the incident light is directed into the first plurality of photodiodes. The metal grid further includes a second plurality of openings through which the incident light is directed through the metal film layer into the second plurality of photodiodes.

Abstract: An image sensor includes a plurality of photodiodes disposed in a semiconductor material and a floating diffusion disposed in the semiconductor material adjacent to a photodiode in the plurality of photodiodes. A transfer gate is disposed to transfer image charge generated in the photodiode into the floating diffusion. A first electrical contact with a first cross sectional area is coupled to the transfer gate. A second electrical contact with a second cross sectional area is coupled to the floating diffusion, and the second cross sectional area is greater than the first cross sectional area. The image sensor also includes pixel transistor region disposed in the semiconductor material including a first electrical connection to the semiconductor material. A third electrical contact with a third cross sectional area is coupled to the first electrical connection to the semiconductor material, and the third cross sectional area is greater than the first cross sectional area.

Abstract: A high-throughput fluorescence imaging system with sample heating capability includes an image sensor wafer with a plurality of image sensors for fluorescence imaging a plurality of samples disposed in a respective plurality of fluidic channels on the image sensor wafer. The high-throughput fluorescence imaging system further includes a heating module, thermally coupled with the image sensor wafer, for heating the samples. A method for high-throughput assay processing includes modulating temperature of a plurality of samples disposed in a respective plurality of fluidic channels on an image sensor wafer by heating the image sensor wafer, using a heating module thermally coupled with the image sensor wafer, to control reaction dynamics in the samples; and capturing a plurality of fluorescence images of the samples, using a respective plurality of image sensors of the image sensor wafer, to detect one or more components of the plurality of samples.

Abstract: A lens-free imaging system for detecting particles in a sample deposited on image sensor includes a fluidic chamber for holding a sample and an image sensor for imaging the sample, wherein the image sensor has a light receiving surface and a plurality of photosensitive pixels disposed underneath the light receiving surface, and wherein the fluidic chamber formed at least in part by the light receiving surface. A method for detecting particles of interest in a sample deposited on an image sensor, through lens-free imaging using the image sensor, includes (ii) generating an image of the sample, deposited on a light receiving surface of the image sensor, by illuminating the sample, and (ii) detecting the particles of interest in the image.

Abstract: A ramp generator for use in readout circuitry includes an integrator coupled to receive a ramp generator input reference signal to generate a reference ramp signal coupled to be received by an analog to digital converter. A power supply compensation circuit that is coupled to generate the ramp generator input reference signal includes a delay circuit including a variable resistor and a filter capacitor coupled to receive a power supply signal. The variable resistor is tuned to match a delay ripple from the power supply to a bitline output. A capacitive voltage divider is coupled to the delay circuit to generate the ramp generator input reference signal. The capacitive voltage divider includes a first variable capacitor coupled to a second variable capacitor that are tuned to provide a capacitance ratio that matches a coupling ratio from the power supply to the bitline output.

Abstract: A dual-mode image sensor with a signal-separating CFA includes a substrate including a plurality of photodiode regions and a plurality of tall spectral filters having a uniform first height and for transmitting a first electromagnetic wavelength range. Each of the tall spectral filters is disposed on the substrate and aligned with a respective photodiode region. The image sensor also includes a plurality of short spectral filters for transmitting one or more spectral bands within a second electromagnetic wavelength range. Each of the short spectral filters is disposed on the substrate and aligned with a respective photodiode region. The image sensor also includes a plurality of single-layer blocking filters for blocking the first electromagnetic wavelength range. Each single-layer blocking filter is disposed on a respective short spectral filter. Each single-layer blocking filter and its respective short spectral filter have a combined height substantially equal to the first height.

Abstract: A method of reading out a pixel includes photogenerating charge carriers during a single integration time in photodetectors of each one of a plurality of sub-pixels included in the pixel. Each one of the plurality of sub-pixels of the pixel has a same color filter. A floating diffusion node of the pixel is reset. The floating diffusion node is sampled to generate a reset output sample signal. Charge carriers that were photogenerated in a first portion of the plurality of sub-pixels are transferred to the floating diffusion node. The floating diffusion node is sampled to generate a first output sample signal. Charge carriers that were photogenerated in a second portion of the plurality of sub-pixels are transferred to the floating diffusion node. The floating diffusion node is sampled to generate a second output sample signal.