Patents Assigned to ON Semiconductor Trading Ltd.
  • Patent number: 8653529
    Abstract: In a semiconductor device in which a glass substrate is attached to a surface of a semiconductor die with an adhesive layer being interposed therebetween, it is an object to fill a recess portion of an insulation film formed on a photodiode with the adhesive layer without bubbles therein. In a semiconductor die in which an optical semiconductor integrated circuit including a photodiode having a recess portion of an interlayer insulation film in the upper portion, an NPN bipolar transistor, and so on are formed, generally, a light shield film covers a portion except the recess portion region on the photodiode and except a dicing region. In the invention, an opening slit is further formed in the light shield film, extending from the recess portion to the outside of the recess portion, so as to attain the object.
    Type: Grant
    Filed: April 22, 2011
    Date of Patent: February 18, 2014
    Assignee: ON Semiconductor Trading, Ltd.
    Inventors: Shinzo Ishibe, Katsuhiko Kitagawa
  • Patent number: 8648557
    Abstract: A drive control signal generating circuit that generates a drive control signal for driving a motor includes an output control circuit that includes a flip-flop in which a state changes by a rotational state signal of the motor crossing a reference value and generates a motor drive control signal according to the state of the flip-flop, a clock generating circuit that generates a clock that defines a time of reading data in the flip-flop of the output control circuit; and a PWM conversion circuit that PWM-converts the drive control signal using the clock as a PWM signal. The clock has a frequency in which the output control circuit operates and has a duty ratio of the PWM signal.
    Type: Grant
    Filed: September 28, 2011
    Date of Patent: February 11, 2014
    Assignee: ON Semiconductor Trading, Ltd.
    Inventors: Takashi Ogawa, Takahisa Nakai, Tsutomu Murata
  • Patent number: 8633511
    Abstract: A semiconductor device provided with: an island and an island which are separated from each other; leads which approach the islands at one end; a control element which is attached to the island and is connected to a lead through a thin metal wire; and a switching element which is attached to the island and is connected to the lead through a metal wire. Further, the thin metal wire and the thin metal wire are arranged so as to the intersect.
    Type: Grant
    Filed: February 25, 2010
    Date of Patent: January 21, 2014
    Assignee: ON Semiconductor Trading, Ltd.
    Inventors: Masakazu Watanabe, Takashi Kuramochi, Masahiro Hatanai
  • Patent number: 8630133
    Abstract: With a serial interface memory device of this invention, a read-out rate of data is increased, while an increase in a size of a circuit is suppressed. An EEPROM is provided with a memory cell array storing data, a row address decoder and a column address decoder that select an address of the memory cell array in accordance with an address signal serially inputted in synchronization with a clock, sense amplifiers SA0-SA5, SA_M0 and SA_M1 each provided corresponding to each bit of the data, and a shift register that outputs the data read out from the sense amplifiers serially from a first bit. The column address decoder commences reading out two candidate data for the first bit by inputting each of the two candidate data to each of the two sense amplifiers SA_M0 and SA_M1, respectively, before all bits of the column address signal are established.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: January 14, 2014
    Assignee: ON Semiconductor Trading, Ltd.
    Inventors: Toshiki Rai, Sadao Yoshikawa
  • Patent number: 8629521
    Abstract: A semiconductor device includes a Hall element, which is switched between a first and second mode. In the first mode, connection A between a first and second resistor and connection C between a third and fourth resistor are set to Vcc or GND. Connection D between the first and fourth resistor and connection B between the second and third resistor are set as output terminals. In the second mode, D and B are set to Vcc or GND and A and C are set as output terminals. When a first line placed along the second resistor and connected to A is set at Vcc in the first mode, a second line placed along the fourth resistor and connected to D is set at Vcc in the second mode. When the first line is set at GND in first mode, the second line is set at GND in the second mode.
    Type: Grant
    Filed: August 23, 2011
    Date of Patent: January 14, 2014
    Assignee: ON Semiconductor Trading, Ltd.
    Inventors: Takashi Ogawa, Hironori Terazawa, Akihiro Hasegawa, Takashi Naruse, Yuuhei Mouri
  • Patent number: 8624408
    Abstract: In a circuit device of the present invention, the lower surface side of a circuit board and part of side surfaces thereof are covered with a second resin encapsulant, and the upper surface side and the like of the circuit board are covered with a first resin encapsulant. Since heat dissipation to the outside of the circuit device is achieved mainly through the second resin encapsulant, a particle size of filler contained in the second resin encapsulant is made larger than a particle size of filler contained in the first resin encapsulant. Heat dissipation to the outside of the circuit device is greatly improved.
    Type: Grant
    Filed: July 22, 2011
    Date of Patent: January 7, 2014
    Assignee: ON Semiconductor Trading, Ltd.
    Inventors: Katsuyoshi Mino, Masaru Kanakubo, Akira Iwabuchi, Masami Motegi
  • Patent number: 8618845
    Abstract: There is offered a switching device control circuit that can accurately estimate a temperature of a power device to execute thermal shutdown without increasing the number of terminals. The control circuit has an output unit controlling an operating current flowing through an IGBT based on an input signal, a temperature detection unit outputting a detection signal when a temperature of the control circuit rises above a second preset temperature that is set corresponding to a first preset temperature of the IGBT after the IGBT commences its operation, and an output control unit controlling the output unit so as to turn off the IGBT in response to the detection signal.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: December 31, 2013
    Assignee: ON Semiconductor Trading, Ltd.
    Inventors: Ryuji Hokabira, Takekiyo Okumura
  • Patent number: 8619058
    Abstract: There is offered an electrostatic capacity type touch sensor capable of detecting a large number of touch positions with high accuracy. The electrostatic capacity type touch sensor is composed of a touch panel and a signal processing circuit. The touch panel is structured to include first through fourth detection electrodes, first and second common electric potential lines, a common electric potential wiring, a common electric potential terminal and first through fourth output terminals disposed on an insulating substrate. The signal processing circuit is structured to include a clock generator, a selection circuit, a charge amplifier, an A/D converter and an arithmetic unit. The charge amplifier detects a change in capacitance induced by that a finger of an operator touches the first through fourth detection electrodes.
    Type: Grant
    Filed: July 1, 2011
    Date of Patent: December 31, 2013
    Assignee: On Semiconductor Trading, Ltd.
    Inventors: Hiroya Ito, Takayasu Otagaki, Atsuhiro Ichikawa, Kazuhiro Hasegawa
  • Patent number: 8618818
    Abstract: This invention offers an electrostatic capacity type touch sensor that can be calibrated in a short period of time at a moment when a finger of operator or the like does not touch a touch pad. An absolute value of a difference (AD0?AD2) between a first output voltage AD0 and a third output voltage AD2 is compared with a first threshold value Vtr1 in step S10. When the difference (AD0?AD2) between the output voltages is smaller than the first threshold value Vtr1, it is judged that the finger of operator or the like does not touch the touch pad, and it is judged which of an offset in a second output voltage AD1 and an offset in the third output voltage AD2 is smaller than the other. When the offset in the second output voltage AD1 is smaller than the offset in the third output voltage AD2, the modification to the second calibration data X1 is permitted.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: December 31, 2013
    Assignee: On Semiconductor Trading, Ltd.
    Inventors: Takayasu Otagaki, Atsuhiro Ichikawa, Hiroya Ito, Kazuhiro Hasegawa
  • Patent number: 8614397
    Abstract: In a circuit device of the present invention, the lower surface side of a circuit board is covered with a second resin encapsulant, and the upper surface side and the like of the circuit board are covered with a first resin encapsulant. Since heat dissipation to the outside of the circuit device is achieved mainly through the second resin encapsulant, a particle size of filler contained in the second resin encapsulant is made larger than a particle size of filler contained in the first resin encapsulant. Heat dissipation to the outside of the circuit device is greatly improved.
    Type: Grant
    Filed: July 22, 2011
    Date of Patent: December 24, 2013
    Assignee: ON Semiconductor Trading, Ltd.
    Inventors: Katsuyoshi Mino, Akira Iwabuchi, Ko Nishimura, Masami Motegi
  • Patent number: 8610168
    Abstract: In a semiconductor device in which an IGBT, a control circuit for the IGBT and so on are formed on an SOI substrate divided by trenches, the invention is directed to providing the IGBT with a higher breakdown voltage, an enhanced turn-off characteristic and so on. An N type epitaxial layer is formed on a dummy semiconductor substrate, a trench is formed in the N type epitaxial layer, an N type buffer layer and then a P type embedded collector layer are formed on the sidewall of the trench and the front surface of the N type epitaxial layer, and the bottom of the trench and the P+ type embedded collector layer are covered by an embedded insulation film. The embedded insulation film is covered by a polysilicon film, and a P type semiconductor substrate is attached to the polysilicon film with an insulation film being interposed therebetween.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: December 17, 2013
    Assignee: ON Semiconductor Trading, Ltd.
    Inventor: Mitsuru Soma
  • Patent number: 8610294
    Abstract: A conventional laser processing method has a problem that the number of scanning lines is large, and it is difficult to shorten the time needed for the marking. In a laser processing method of the present invention, a first laser processing is performed in accordance with the outer border of, for example, an English letter “A,” and thereafter, second and subsequent laser processings are performed on an inner region inside the outer border. In this event, for the second and subsequent laser processings, the respective processing lines (scanning lines) are set up in a longitudinal direction of a processing region. Thus, the number of processing lines is greatly reduced. As a result, the time needed for the marking is greatly shortened, and the laser marking workability is improved.
    Type: Grant
    Filed: July 21, 2011
    Date of Patent: December 17, 2013
    Assignee: On Semiconductor Trading, Ltd.
    Inventors: Yutaka Hasegawa, Masaaki Shiraishi
  • Patent number: 8598824
    Abstract: A motor drive circuit includes: a drive circuit configured to drive a motor whose coil current decreases with increase in counter electromotive voltage of a motor coil; a detection circuit configured to detect whether or not a current value of the coil current is greater than a predetermined value; a first control circuit configured to control the drive circuit so that the current value of the coil current becomes smaller than or equal to the predetermined value, when it is detected that the current value of the coil current is greater than the predetermined value; and a second control circuit configured to control the first control circuit so that the first control circuit does not control the drive circuit based on a detection result of the detection circuit until a predetermined time has elapsed from a start of supply of the coil current.
    Type: Grant
    Filed: July 27, 2011
    Date of Patent: December 3, 2013
    Assignee: ON Semiconductor Trading Ltd.
    Inventors: Tatsuo Ito, Yuji Uchiyama
  • Patent number: 8593100
    Abstract: A motor drive circuit is configured to drive a motor coil based on duty ratio of a PWM signal, and includes a first pulse signal generating circuit configured to generate a first pulse signal for each time period, the time period being equal to 1/n of a time period during which the PWM signal is at one logic level, a counter configured to change a count value based on the first pulse signal, a drive signal output circuit configured to output a drive signal of one logic level when the count value is not a predetermined value and output the drive signal of the other logic level when the count value reaches the predetermined value, a drive circuit configured to perform PWM driving for the motor coil based on the duty ratio of the drive signal, and a setting circuit.
    Type: Grant
    Filed: April 21, 2011
    Date of Patent: November 26, 2013
    Assignee: ON Semiconductor Trading, Ltd.
    Inventors: Masahiro Nakahata, Toshiyuki Imai
  • Patent number: 8575847
    Abstract: A control circuit of a light-emitting element comprises a rectifying unit (30), a switching element (38), a transformer (48) having a first winding (L1) which generates a magnetic field using a current controlled by switching of the switching element (38), a second winding (L2) which is magnetically coupled to the first winding (L1) and which generates a current flowing to an LED (102), and a third winding (L3) which is magnetically coupled to the first winding (L1) and which generates a voltage (Sfbk), and an averaging capacitor (32) which averages a voltage derived by superposing a voltage (Srec) rectified by the rectifying unit (30) and the voltage (Sfbk), and a voltage averaged by the averaging capacitor (32) is applied to the first winding (L1), so that light is emitted from the LED (102).
    Type: Grant
    Filed: April 22, 2011
    Date of Patent: November 5, 2013
    Assignee: ON Semiconductor Trading, Ltd.
    Inventors: Yoshio Fujimura, Shinichi Yamamoto, Feng Xu
  • Publication number: 20130286618
    Abstract: A compact circuit device wherein a semiconductor element that performs high current switching is embedded is provided. The hybrid integrated circuit device (10) is provided with: a circuit board (12); a plurality of ceramic substrates (22A-22G) disposed on the top surface of the circuit board (12); circuit elements such as transistors mounted on the top surface of the ceramic substrates (22A-22G); and a lead (29) or the like that is connected to the circuit elements and is exposed to the outside. Furthermore, in the present embodiment, leads (28, 30, 31A-31C) are disposed superimposed in the vicinity of the center of the circuit board (12), and a circuit element such as an IGBT is disposed and electrically connected approaching the region at which the leads are superimposed. The alternating current transformed by the IGBT is output externally via the leads (31A, etc.).
    Type: Application
    Filed: September 15, 2011
    Publication date: October 31, 2013
    Applicant: ON Semiconductor Trading, Ltd.
    Inventors: Takashi Shibasaki, Hidefumi Saito, Takahisa Makino, Masanori Shimizu, Daisuke Sasaki
  • Publication number: 20130286616
    Abstract: A circuit device having superior voltage resistance is provided. A structure is achieved that omits the resin layer that is normally provided to the top surface of a circuit board. Specifically, a ceramic substrate (22) is disposed on the top surface of a circuit board (12) comprising a metal, and a transistor (34) such as an IGBT is mounted to the top surface of the ceramic substrate (22). As a result, the transistor (34) and the circuit board (12) are insulated from each other by the ceramic substrate (22). The ceramic substrate (22), which comprises an inorganic material, has an extremely high voltage resistance compared to the conventionally used insulating layer comprising resin, and so even if a high voltage on the order of 1000V is applied to the transistor (34), short circuiting between the transistor (34) and the circuit board (12) is prevented.
    Type: Application
    Filed: September 15, 2011
    Publication date: October 31, 2013
    Applicant: ON Semiconductor Trading, Ltd.
    Inventors: Takashi Shibasaki, Hidefumi Saito, Takahisa Makino, Masanori Shimizu, Daisuke Sasaki
  • Publication number: 20130286594
    Abstract: Provided are: a circuit device which has improved connection reliability in a solder joint portion by suppressing the occurrence of sink of solder; and a method for manufacturing the circuit device. In a method for manufacturing a circuit device of the present invention, a plurality of solders (19), which are apart from each other, are firstly formed on the upper surface of a pad (18A), and a chip component (14B) and a transistor (14C) are affixed at the same time. After that, a solder paste (31) is supplied to the upper surface of the pad (18A) using a syringe (30), a heatsink (14D) is mounted on top of the solder paste (31), and melting is caused by a reflow process. There is little risk of sinking of the solders (19) in the present invention since the solders (19) are discretely arranged on the upper surface of the pad (18A).
    Type: Application
    Filed: October 12, 2011
    Publication date: October 31, 2013
    Applicant: ON SEMICONDUCTOR TRADING LTD
    Inventors: Nobuhisa Onai, Masami Motegi
  • Publication number: 20130286617
    Abstract: A compact circuit device wherein a semiconductor element that performs high current switching is embedded is provided. A lead (30) and lead (28) though which high current passes are disposed superimposed on the upper surface of a circuit board (12). Also, a plurality of ceramic substrates (22A-22F) are affixed to the circuit board (12), and transistors, diodes, or resistors are mounted to the upper surface of the ceramic substrates. Furthermore, the circuit elements such as the transistors or diodes are connected to the lead (28) or the other lead (30) via fine metal wires.
    Type: Application
    Filed: September 15, 2011
    Publication date: October 31, 2013
    Applicant: ON Semiconductor Trading, Ltd.
    Inventors: Takashi Shibasaki, Hidefumi Saito, Takahisa Makino, Masanori Shimizu, Daisuke Sasaki
  • Patent number: 8569964
    Abstract: A control circuit of a light-emitting element comprises a rectifying unit (30) which full-wave rectifies an alternating current power supply, a switching element (38), a reference voltage generating unit (40) which generates a reference voltage (Vref), and a comparator (42) which receives a voltage (Srec) rectified by the rectifying unit (30), compares a comparative voltage (Vcmp) corresponding to a current flowing to an LED (102) and the reference voltage (Vref), and controls switching of the switching element (38) according to a comparison result, wherein the reference voltage generating unit (40) comprises a voltage dividing circuit having a transistor (Q1) in which a resistance value between a source and a drain is changed according to the voltage rectified by the rectifying unit (30), and outputs, using the voltage dividing circuit, the reference voltage (Vref) according to the voltage (Srec) rectified by the rectifying unit (30).
    Type: Grant
    Filed: April 28, 2011
    Date of Patent: October 29, 2013
    Assignee: ON Semiconductor Trading, Ltd.
    Inventors: Feng Xu, Yoshio Fujimura