Abstract: Disclosed is a semiconductor device which consumes low power and has high reliability and tolerance for electrostatic discharge. The semiconductor device includes, over a first substrate, a pixel portion and a driver circuit portion both of which have a thin film transistor having an oxide semiconductor layer. The semiconductor device further possesses a second substrate to which a first counter electrode layer and a second counter electrode layer are provided, and a liquid crystal layer is interposed between the first and second substrates. The first and second counter electrode layers are provided over the pixel portion and the driver circuit portion, respectively, and the second counter electrode layer has the same potential as the first counter electrode layer.

Abstract: Systems and methods for a two lead electronic switch adapted to replace a mechanical switch are provided.

Abstract: A method of manufacturing a microelectronic device including forming a dielectric layer surrounding a dummy feature located over a substrate, removing the dummy feature to form an opening in the dielectric layer, and forming a metal-silicide layer conforming to the opening. The metal-silicide layer may then be annealed.

Abstract: In one or more embodiments, one or more methods, processes, and/or systems described can determine stress failures in interconnect segments of integrated circuit designs and correct those failure via modifying the interconnect segments of the integrated circuit designs with one or more additions to the interconnect segments of the integrated circuit designs. Potentials can be received from a simulation, and one or more failures of an interconnect segment can be determined via the potentials from the simulation. For example, a failure can be determined via a comparison with a potential from the simulation and a critical potential. An interconnect segment can be modified with a stub such that a comparison with a potential from the simulation and a critical potential to provide a non-failing, modified interconnect segment.

Abstract: The present disclosure provides a method that includes forming a first photoresist layer on a substrate; forming a second photoresist layer over the first photoresist layer; and performing a lithography exposure process to the first photoresist layer and the second photoresist layer, thereby forming a first latent feature in the first photoresist layer and a second latent feature in the second photoresist layer.

Abstract: A USB device and a detection method therefor. It can be detected whether the USB device is a master device or a slave device without the use of an ID pin, thereby saving the pin resources of the USB device.

Abstract: A circuit includes a failure address register configured to store a first row address, a row address modifier coupled to the failure address register, wherein the row address modifier is configured to modify the first row address received from the failure address register to generate a second row address. A first comparator is configured to receive and compare the first row address and a third row address. A second comparator is configured to receive and compare the second row address and the third row address. The first and the second row addresses are failed row addresses in a memory.

Abstract: One object is to provide a method for manufacturing a display device in which shift of the threshold voltage of a thin film transistor including an oxide semiconductor layer can be suppressed even when ultraviolet light irradiation is performed in the process for manufacturing the display device. In the method for manufacturing a display device, ultraviolet light irradiation is performed at least once, a thin film transistor including an oxide semiconductor layer is used for a switching element, and heat treatment for repairing damage to the oxide semiconductor layer caused by the ultraviolet light irradiation is performed after all the steps of ultraviolet light irradiation are completed.

Abstract: Provided is an output buffer for a source driver circuit which receives an external buffer input signal and generates a buffer output signal having a predetermined target voltage, the output buffer including: an over-driving controller configured to generate a pair of first internal buffer input signals and a pair of second internal buffer input signals for an over-driving operation, based on a first over-driver enable signal and a second over-driver enable signal, the first and second over-driver signals being provided from an external source, and an output buffer unit configured to: perform the over-driving operation, based on the pair of first internal buffer input signals and the pair of second internal buffer input signals provided from the over-driving controller, and generate: a buffer output signal including a target voltage greater than the predetermined target voltage, or a buffer output signal including a target voltage less than the predetermined target voltage.

Abstract: A BioMEMS microelectromechanical apparatus and for fabricating the same is disclosed. A substrate is provided with at least one signal conduit formed on the substrate. A sacrificial layer of sacrificial material may be deposited on the signal conduit and optionally patterned to remove sacrificial material from outside the packaging covered area. A bonding layer may be deposited on at least a portion of the signal conduit and on the sacrificial layer when included. The bonding layer may be planarized and patterned to form one or more cap bonding pads and define a packaging covered area. A cap may be bonded on the cap bonding pad to define a capped area and so that the signal conduit extends from outside the capped area to inside the capped area. Additionally, a test material such as a fluid may be provided within the capped area.

Abstract: The present disclosure describes a method of optimizing a design for manufacture (DFM) simulation. The method includes receiving an integrated circuit (IC) design data having a feature, receiving a process data having a parameter or a plurality of parameters, performing the DFM simulation, and optimizing the DFM simulation. The performing the DFM simulation includes generating a simulation output data using the IC design data and the process data. The optimizing the DFM simulation includes generating a performance index of the parameter or the plurality of parameters by the DFM simulation. The optimizing the DFM simulation includes adjusting the parameter or the plurality of parameters at outer loop, middle loop, and the inner loop. The optimizing the DFM simulation also includes locating a nadir of the performance index of the parameter or the plurality of parameters over a range of the parameter or the plurality of parameters.

Abstract: A method for producing a plurality of radiation-emitting components includes A) providing a carrier layer having a plurality of mounting regions separated from one another by separating regions; B) applying an interlayer to the separating regions; C) applying a respective radiation-emitting device to each of the plurality of mounting regions; D) applying a continuous potting layer to the radiation-emitting device and the separating regions; E) severing the potting layer and partially severing the interlayer in the separating regions of the carrier layer in a first separating step; and F) partially severing the interlayer and severing the carrier layer in a second separating step, wherein the interlayer is completely severed by the first and the second separating step.

Abstract: An apparatus for mounting a pellicle onto a mask is provided. In one embodiment, the apparatus comprises a base provided with a track; a dummy plate holder coupled to the base, the dummy plate holder for receiving a dummy plate having an elevated portion on one side thereof; a mask holder for receiving a mask, the mask holder slidably coupled to the base; a pellicle holder for receiving a pellicle frame, the pellicle holder slidably coupled to the base; and drive means being adapted to drive the pellicle holder along the track towards the dummy plate holder, wherein during operation when the pellicle frame is mounted onto the mask causing the mask to contact the dummy plate, the mounting pressure in the mask is distributed by way of the elevated portion in the dummy plate, thus reducing distortion in the mask.

Abstract: A power supply system is provided that provides voltage clamping capabilities to provide over voltage protection to circuit elements and circuit systems. The power supply includes isolation mechanisms that generate a regulated power supply that is independent of an input power source. Voltage addition/multiplication techniques may be utilized to generate a reference voltage, from the regulated power supply, that is capable of setting a maximum voltage on a clamped power supply. The power supply system may operate without input from other circuits/systems associated with an integrated circuit.

Abstract: A semiconductor device including a semiconductor element, a die pad of a plane size smaller than that of the semiconductor element, a plurality of hanging leads extending from the die pad, and sealing resin for covering the semiconductor element, the die pad, and the hanging leads. The width of a first main surface of each hanging lead, integrated with the mounting surface of the die pad, is smaller than the width of a second main surface thereof, integrated with the opposite surface of the die pad.

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a substrate that spans in an X-direction and a Y-direction that is orthogonal to the X-direction. The semiconductor device includes an interconnect structure formed over the substrate in a Z-direction that is orthogonal to both the X-direction and the Y-direction. The interconnect structure includes a plurality of metal lines interconnected together in the Z-direction by a plurality of vias. The interconnect structure contains a transformer device that includes a primary coil and a secondary coil. The primary coil and the secondary coil are each wound at least partially in the Z-direction.

Abstract: An ESD protection circuit for an RF semiconductor device includes an RF input pad configured to receive an RF input signal having an RF operating frequency for the RF semiconductor device. A first ESD block is coupled between an intermediate node and the first power supply voltage terminal, to direct an ESD pulse of a first polarity toward the first power supply voltage terminal. A second ESD block is coupled between the intermediate node and the second power supply voltage terminal, to direct an ESD pulse of a second, opposite polarity toward the second power supply voltage terminal. A resonance circuit is coupled between the RF input pad and the intermediate node. The resonance circuit is configured to present a greater impedance to the RF input signal having the RF operating frequency than to the ESD pulses.

Abstract: It is an object to provide a driving support system and a display device suitable for the driving support system. According to the driving support system, change in driver's mental and physical conditions can be caught instantaneously and a warning light emission display is given within the forward sight of the driver in order to call the driver's attention. A light emitting device of the driving support system can display a far side of the display. A display may be switched between a transmission mode and a non-transmission mode by adjusting a movable polarizer.

Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Abstract: A multiple-antenna receiver can enable and disable receive radio frequency front-end and analog front-end circuits of specific antenna receiving routes according to a predetermined scheme during the receive data phase. The predetermined scheme calculates signal quality indices of the receiving route antennas according to a preamble sequence, and derives the modulation and coding scheme and the number of spatial streams via the information provided by a header sequence. Indications of the signal quality indices are compared with threshold values to determine which receiving routes are to be turned on and which receiving routes are to be turned off.