Abstract: A network switch includes first and second clock-and-data-recovery (CDR) circuits, a cross-bar switch electrically coupling the first and second CDR circuits, and a test pattern generation circuit electrically coupled to the first CDR circuit. The test pattern generation circuit is configured to generate a test pattern and transmit the test pattern from the first CDR circuit to the second CDR circuit via the cross-bar switch. The network switch also includes a test pattern checking circuit electrically coupled to the second CDR circuit and configured to verify the test pattern received at the second CDR circuit.
Abstract: A network switch includes first and second clock-and-data-recovery (CDR) circuits, a cross-bar switch electrically coupling the first and second CDR circuits, and a test pattern generation circuit electrically coupled to the first CDR circuit. The test pattern generation circuit is configured to generate a test pattern and transmit the test pattern from the first CDR circuit to the second CDR circuit via the cross-bar switch. The network switch also includes a test pattern checking circuit electrically coupled to the second CDR circuit and configured to verify the test pattern received at the second CDR circuit.
Abstract: A network switch includes first and second clock-and-data-recovery (CDR) circuits, a cross-bar switch to couple the first and second CDR circuits, and a first test pattern generation circuit electrically coupled with the first CDR circuit. The first test pattern generation circuit is configured to generate a test pattern and transmit the test pattern from the first CDR circuit to the second CDR circuit via the cross-bar switch. The network switch also includes a first test pattern checking circuit, electrically coupled with the second CDR circuit, to verify the test pattern received at the second CDR circuit.
Abstract: The network switch is configured to enable monitoring of switched data. The network switch includes a housing and one or more port cards. Each port card has one or more physical ports and includes switching circuitry to selectively create a communication path between two physical ports. The network switch also includes packet analyzer circuitry, situated within the housing, to monitor data packets switched via a communication path between two physical ports without substantially degrading signal integrity of the data packets.
Type:
Grant
Filed:
July 2, 2008
Date of Patent:
November 16, 2010
Assignee:
OnPath Technologies Inc.
Inventors:
Larry Cantwell, Hee Lui, Ghanshyam Dave