Patents Assigned to OnSpec Electronic Inc.
  • Publication number: 20030172295
    Abstract: A device for allowing secure identification of an individual when accessing information is disclosed. The device comprises a serial port and a controller coupled to the serial port. The device further includes a storage medium coupled to the controller; the storage medium including security information which can be accessed by the controller. A device in accordance with the present invention may take a variety of physical forms. In a preferred embodiment, a USB (universal serial bus) connection is utilized for connecting the device to a computer. Such a device has a unique ID embedded in an integrated circuit inside the device. The device can optionally store in excess of 1 gigabyte of information. Information within the device can be protected by various layers of security (password layer, unique ID layer, encryption layer). The level of security can include all of these layers, as well as any subset of these layers.
    Type: Application
    Filed: March 1, 2002
    Publication date: September 11, 2003
    Applicant: OnSpec Electronics, Inc.
    Inventors: Larry Lawson Jones, Sreenath Mambakkam, Arockiyaswamy Venkidu, Nicholas Antonopoulos
  • Publication number: 20030041203
    Abstract: A flash-memory-card reader reads and writes multiple types of flash-memory cards, including CompactFlash, and the smaller SmartMedia, MultiMediaCard, Secure Digital, and Memory Stick. A converter chip converts the different card signals for transfer to a host personal computer (PC). Serial-to-parallel data conversion is performed for the smaller card formats with serial data interfaces, but not for CompactFlash with a parallel-data interface. A single slot has a 50-pin connector for CompactFlash cards or passive adapters. The passive adapters have the CompactFlash form factor and a smaller connector fitting smaller flash cards. Passive adapters have no components but simply wire the smaller connector to the CompactFlash connector. A pin mapping allows card-type detection by sensing the LSB address pins of the CompactFlash interface. A larger CompactFlash reader has multiple slots for each card type. The reader is connected to the PC by a cable, or located within the PC chassis in a drive bay.
    Type: Application
    Filed: June 11, 2002
    Publication date: February 27, 2003
    Applicant: OnSpec Electronic, Inc.
    Inventors: Larry Lawson Jones, Sreenath Mambakkam, Arockiyaswamy Venkidu
  • Patent number: 6438638
    Abstract: A flash-memory-card reader reads and writes multiple types of flash-memory cards, including CompactFlash, and the smaller SmartMedia, MultiMediaCard, Secure Digital, and Memory Stick. A converter chip converts the different card signals for transfer to a host personal computer (PC). Serial-to-parallel data conversion is performed for the smaller card formats with serial data interfaces, but not for CompactFlash with a parallel-data interface. A single slot has a 50-pin connector for CompactFlash cards or passive adapters. The passive adapters have the CompactFlash form factor and a smaller connector fitting smaller flash cards. Passive adapters have no components but simply wire the smaller connector to the CompactFlash connector. A pin mapping allows card-type detection by sensing the LSB address pins of the CompactFlash interface. A larger CompactFlash reader has multiple slots for each card type. The reader is connected to the PC by a cable, or located within the PC chassis in a drive bay.
    Type: Grant
    Filed: July 6, 2000
    Date of Patent: August 20, 2002
    Assignee: OnSpec Electronic, Inc.
    Inventors: Larry Lawson Jones, Sreenath Mambakkam, Arockiyaswamy Venkidu
  • Patent number: 5623274
    Abstract: A front-panel display of a PC has several 7-segment light-emitting diode (LED) displays. A serial link is provided from an I/O port on the PC motherboard to the front panel display. This serial link uses the turbo-in line that is normally used to light the turbo LED indicator. A microcontroller on the front-panel display samples the turbo-in line and extracts serial data once a start sequence is detected. The serial data is converted to parallel form, and then encoded into a code that can be decoded by the 7-segment LED displays. The microcontroller drives this code to the 7-segment displays so that the serial data from the I/O port on the PC motherboard is displayed by the 7-segment displays on the front panel. Software on the PC periodically writes to the I/O port to update the data bit transmitted. This software can thus alter the front panel display. Information displayed on the front panel can include the temperature of the CPU or power reduction in suspend modes.
    Type: Grant
    Filed: February 17, 1995
    Date of Patent: April 22, 1997
    Assignee: OnSpec Electronic, Inc.
    Inventors: Arockiyaswamy Venkidu, Larry Jones, Sreenath Mambakkam
  • Patent number: 5459462
    Abstract: A logic device having a state machine for serially transferring data between an AT-compatible mother board and a keyboard having a microcontroller for scanning the keyboard matrix, without the need for a microcontroller on the mother board. A timer is provided to signal a transmission time-out error, and to indicate the start delay before beginning to transfer data when transmitting to the keyboard. Transmission to the keyboard begins by asserting the clock and serial data bit to the keyboard, and waiting for the start delay to expire. The state machine has a chain of 22 states for transferring an 11-bit data frame, the state transitions occurring after the clock from the keyboard or mouse changes polarity. A time-out error state is entered if a timer indicates that a 32 ms period of time has elapsed. Both transmit and receive operations may time-out with the same delay, and enter the same error state.
    Type: Grant
    Filed: December 9, 1993
    Date of Patent: October 17, 1995
    Assignee: OnSpec Electronic, Inc.
    Inventors: Arockiyaswamy Venkidu, Larry Jones
  • Patent number: 5355377
    Abstract: A parity generating circuit that can replace the parity bit DRAM on a 9-bit SIMM. The parity generating circuit includes a parity generating tree which outputs the resulting even parity from the 8 data bits on a read. A 9th data input from another parity generator on the system mother board is compared to the generator tree output when DRAM is written to. If a mismatch occurs, the type of parity generated by the generator tree is opposite to the type of parity that the mother board generates, and the parity tree output must be inverted on subsequent reads. A latch is provided to store the compare result, which also indicates the type of parity required, even or odd, on the particular system the SIMM is installed on. The latch is loaded when the DRAM is written to. The state of the latch is used to output the correct type of parity on a read from DRAM by inverting the output of the parity generating circuit if needed.
    Type: Grant
    Filed: November 23, 1993
    Date of Patent: October 11, 1994
    Assignees: Tetra Assoc. Inc., OnSpec Electronic Inc.
    Inventors: Arockiyaswamy Venkidu, Larry Jones, Nick Antonopoulos