Patents Assigned to OPTICORE TECHNOLOGIES, INC.
  • Patent number: 11882121
    Abstract: The present invention provides a method for packet processing according to a access control list table, comprising: receiving a packet, wherein the packet includes a packet information and match items for matching; providing an access control list (ACL) codeword table; providing a mask table, wherein the ACL codeword table corresponds to the mask table; obtaining a hash key by performing a multiplexing logic operation, wherein the hash key is made by combining a multiplex result of the packet information and the mask table; obtaining a hash value by performing a hash function based on the hash key, wherein the hash value is composed of X+Y, wherein X is a signature table (hash table) index and Y is a key digest; performing a hash table indexing, based on the signature table index, wherein the signature table index is the index to an address of signature table; performing a fast pattern match, wherein the signature table contains signature fields, and if any second signature field in the signature table is mat
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: January 23, 2024
    Assignee: OPTICORE TECHNOLOGIES, INC.
    Inventors: Yi-Lung Hsiao, Chih-Liang Chou
  • Patent number: 11811724
    Abstract: The present invention provides a method of using a mac-table cache to resolve UNI port information on an external system of chip (SOC) is provide. The method comprises, receiving, by a packet processing chip, a packet with a source address (SA); locating, by the packet processing chip, the SA in a mac-table cache implemented on the packet processing chip; and looking up a SOC mac-table implemented on the external SOC if the SA cannot be found in the mac-table cache.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: November 7, 2023
    Assignee: OPTICORE TECHNOLOGIES, INC.
    Inventor: Chung-Kai Tung
  • Patent number: 11449275
    Abstract: The present invention provides a method and system for binary search. The method comprises providing a memory device with M entries, each entry storing a value; providing an index register including N register blocks, wherein the N register blocks partition the memory device into N?1, N or N+1 search areas; wherein M and N are integers and N<M; wherein when a target value is being searched in the memory device, the target value is determined to be fall between two adjacent register blocks, and only the addresses of the memory device in between the two register blocks are left for search.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: September 20, 2022
    Assignee: OPTICORE TECHNOLOGIES INC. (US)
    Inventors: Yi-Lung Hsiao, Chih-Liang Chou