Abstract: Embodiments of the present invention provide a system that performs a speculative writestream transaction. The system starts by receiving, at a home node, a writestream ordered (WSO) request to start a WSO transaction from a processing subsystem. The WSO request identifies a cache line to be written during the WSO transaction. The system then sends an acknowledge signal to the processing subsystem to enable the processing subsystem to proceed with the WSO transaction. During the WSO transaction, the system receives a second WSO request to start a WSO transaction. The second WSO request identifies the same cache line as to be written during the subsequent WSO transaction. In response to receiving the second WSO request, the system sends an abort signal to cause the processing subsystem to abort the WSO transaction.

Abstract: One embodiment of the present invention provides a system that facilitates issuing rights in a digital rights management system. The system operates by sending a request to perform an operation on an item of content from a client to a rights-management server, wherein the request includes a usage parameter which specifies constraints involved in performing the operation. Next, the system receives a response from the rights-management server, wherein the response indicates whether or not the client has rights to perform the operation in accordance with the constraints specified by the usage parameter. Note that the response may also include a hint that facilitates generating subsequent requests to perform the operation. Finally, if the client has rights to perform the operation, the system performs the operation on the item of content.

Abstract: A method, system, and computer accessible medium for an identity based user interface. An identity based user interface may display user interface elements including communication-related information for a plurality of identities. The communication related information may indicate multiple communication mechanisms for each identity. In response to selection of one of the communication mechanisms, an identity based user interface may initiate communication with the corresponding identity using the selected mechanism. An identity based user interface may also display information regarding the presence, reach-ability or future availability for one or more of the identities and may request and receive such information from an identity framework. An identity based user interface may utilize shared identity objects to store and maintain the communication related information.

Abstract: A method and system for adding annotations to content of a webpage provided by a content server includes identifying a portion of the content of the webpage and applying an annotation to the identified portion of the content. The annotation is associated with the identified portion. The annotation and its association with the identified portion is saved on an annotations server and a link is generated to an annotated webpage wherein the content for webpage is received from a content server and the annotation is received from the annotations server. The link is sharable so as to enable others to view the annotation associated with the identified portion of the content.

Abstract: A processor may include several processor cores, each including a respective higher-level cache, wherein each higher-level cache includes higher-level cache lines; and a lower-level cache including lower-level cache lines, where each of the lower-level cache lines may be configured to store data that corresponds to multiple higher-level cache lines. In response to invalidating a given lower-level cache line, the lower-level cache may be configured to convey a sequence including several invalidation packets to the processor cores via an interface, where each member of the sequence of invalidation packets corresponds to a respective higher-level cache line to be invalidated, and where the interface is narrower than an interface capable of concurrently conveying all invalidation information corresponding to the given lower-level cache line. Each invalidation packet may include invalidation information indicative of a location of the respective higher-level cache line within different ones of the processor cores.

Abstract: A virtual installation map, and method involving installing a software functionality using the same, the virtual installation map including a first software installation map including a plurality of software elements representative of a related software file, the software elements also including at least one dependency to another software element. The virtual installation map further including a second software installation map also including a second plurality of software elements representative of related software file along with related dependencies. The first and second software installation maps may be hosted in separate databases and may relate to software products provided by different vendors. One or both software installation maps may include a pointer or other reference to the other installation map thereby providing a virtual installation map, in one example.

Abstract: A data space profiler may include an analysis engine that associates runtime events of profiled software applications with execution costs and extended address elements. Relational agents in the analysis engine may apply functions to profile data collected for each event to determine the extended address element values to be associated with the event. Each extended address element may correspond to a data profiling object (e.g., hardware component, software construct, data allocation construct, abstract view) involved in each event. The extended address element values may be used to index into an event set for the profiled software application to present costs from the perspective of these profiling objects. A filtering mechanism may also be used to extract profile data from the event set corresponding to events that satisfy the filter criteria. By alternating between presentation of profiling object views and filtered event data, performance bottlenecks and their causes may be identified.

Abstract: A system including a first physical network interface card (NIC) include a number of rings, where at least one of the rings is an active ring. The system further includes a host, operatively connected to the first NIC, and including Media Access Control (MAC) layer. The MAC layer is configured to obtain a power management policy, obtain a load associated with the active ring, determine, using the power management policy and the load, that the state associated with at least one of the rings must be changed, and change, in response to the determining, the state of at least one of the of rings.

Abstract: A system for characterizing vibration of a rack structure having at least one hard disk drive disposed therein and a vibration exciter operatively associated with the rack structure includes one or more computers. The one or more computers are configured to command the vibration exciter to provide vibration input to the rack structure and to command a plurality of reads from the at least one hard disk drive such that, for each of the plurality of reads, data stored on the at least one hard disk drive is retrieved from the at least one hard disk drive. The one or more computers are also configured to obtain read rate information related to the plurality of reads and to identify at least one resonant frequency of the rack structure based on the read rate information.

Abstract: A computer readable medium includes executable instructions for resilvering a hierarchical block tree in a storage pool. Resilvering the hierarchical block tree involves traversing a branch of the hierarchical block tree only if a birth time of a parent block of the branch is greater than or equal to a lowest birth time on a dirty time log (DTL). Resilvering the hierarchical block tree further involves resilvering a child block in the branch only if the DTL comprises a birth time of the child block.

Abstract: A method for managing computing resources involves obtaining, by an electronic broker agent, a request to broker access to one or more computing resources, and brokering, by the electronic broker agent, access to the computing resource(s) based on the request.

Abstract: One embodiment provides a system that prevents duplicate entries in a non-blocking TLB that supports multiple page sizes and speculative execution. During operation, after a request for translation of a virtual address misses in the non-blocking TLB, the system receives a TLB fill. Next, the system determines a page size associated with the TLB fill, and uses this page size to determine a set of bits in the virtual address that identify the virtual page associated with the TLB fill. The system then compares this set of bits with the corresponding bits of other virtual addresses associated with pending translation requests. If the system detects that a second virtual address for another pending translation request is also satisfied by the TLB fill, the system invalidates the duplicate translation request associated with the second virtual address.

Abstract: A system and method for storing data in a virtual file system using write once read many (WORM) protection includes a WORM server in communication with one or more storage devices and a controller in communication with the WORM server. A first time stamping process for creating a first time stamp for a data object based on instructions applied by the controller for storage on the WORM server. A second time stamping process for creating a second time stamp for the data object for storage on the WORM server. The second time stamping process creates the second time stamp for the data object and first time stamp to ensure the integrity of the data object stored on the system.

Abstract: A method for configuring a packet destination, that includes creating the packet destination on a host, obtaining a network configuration for the packet destination, determining whether the host comprises a virtual network stack, where the virtual network stack includes the network configuration, and assigning the packet destination to the virtual network stack.

Abstract: A virtual installation map, and method involving installing a software functionality using the same, the virtual installation map including a first software installation map including a plurality of software elements representative of a related software file, the software elements also including at least one dependency to another software element. The virtual installation map further including a second software installation map also including a second plurality of software elements representative of related software file along with related dependencies. The first and second software installation maps may be hosted in separate databases and may relate to software products provided by different vendors. One or both software installation maps may include a pointer or other reference to the other installation map thereby providing a virtual installation map, in one example.

Abstract: A method for notifying a packet destination that includes receiving a packet by a network interface card (NIC), where the packet destination is a destination of the packet, classifying the packet, forwarding the packet to one of a plurality of receive rings on the NIC, determining whether the one of the plurality of receive rings comprises space to store the packet, dropping the packet if the receive ring does not comprise the space to store the packet, and sending a notification message to the packet destination, where the notification message indicates that the packet was dropped by the receive ring.

Abstract: A system and method for selectively replacing standard threshold voltage devices with low threshold voltage devices in a digital logic design. The system identifies at least one path having a first timing value, the path having a plurality of standard threshold devices. The path is reverse traversed, or otherwise analyzed or traversed, to identify at least one of the standard threshold devices to possibly replace with a corresponding low threshold device. The system also determines a timing value for the path associated with replacing the at least one standard threshold device with the corresponding low threshold device. Depending the analysis, the standard threshold device may be replaced with a low threshold device, such as when the path timing improves by replacement. Such replacement may be used in various paths, such as paths considered critical paths in a digital logic design.

Abstract: A system and method for profiling a network application may provide for operating on context-specific data and costs. The system may include an apparatus for associating local extended address elements with a message sent from a first computing system to a second computing system across a network. The second computing system may store the received information as remote extended address information and may store its own local extended address information. An event agent may capture values of local and/or remote extended address elements in response to detecting the message or another system event and may associate the extended address elements with the message or system event in an event set accessible by a data space profiler. The extended address information may include time stamps. An event agent may determine network latency dependent on time stamps of messages and may generate an event if the latency exceeds a predetermined threshold.

Abstract: A method of reproducing runtime environment for debugging an application includes reading an optimizer file from a non-volatile storage medium. The optimizer file includes a runtime environment, application definition information, and a log. The log includes summaries of events, actions, and a time mark of occurrence for each of the actions. A runtime environment for debugging the application is then defined and the application runtime is set up using the application definition information in the optimizer file. Further, the method includes running the application, attaching an optimizer, and triggering each of the actions to occur at a time mark of occurrence associated with each of the actions. Then, each of the actions and associated events is analyzed by comparing the events produced by running the application with the events in the optimizer file. If a fault is produced by the triggering, a debugger is invoked to analyze the fault.

Abstract: A method for accessing a virtual memory of a processor using a processor-bus-connected flash storage module (PFSM) as a first paging device and a hard disk drive (HDD) as a second paging device, the method including: allocating a first address partition and a second address partition of a virtual memory for a software application of a processor to the first paging device and the second paging device, respectively, identifying a virtual memory page in the first paging device responsive to a page fault of the virtual memory triggered by the software application, sending a page access request to the PFSM for accessing the virtual memory page responsive to the page fault, and receiving the virtual memory page from the PFSM based on a command of the processor bus issued by the PFSM in conjunction with performing a flash memory access in the flash memory using a flash page address.