Abstract: Methods, systems, and articles of manufacture consistent with the present invention provide an improved technique for analyzing statements that use pointer or array syntax to access dynamically-allocated arrays to determine whether the statement generates a reference that is outside the bounds of the array's allocated memory. Statements that use pointer or array syntax to access dynamically-allocated arrays can be either statically (at compile-time) or dynamically bounds (at run-time) checked. Methods and systems in accordance with the present invention determine at compile-time if an array reference can be determined to always be in bounds or definitely out of bounds at least once, and if not, insert code into the program to check the array bounds dynamically at run-time before the access of the array reference.

Abstract: A mechanism is disclosed for enabling an attribute provider service (APS), which provides access to one or more attributes, to control access to the attributes at the attribute level. In one implementation, a request is received, which specifies a particular attribute that is desired to be accessed from an attribute repository. In response to this request, a policy that applies to the particular attribute is accessed. The policy is then processed to determine whether access to the particular attribute is to be allowed or denied. With the above mechanism, it is possible to control access to attributes at the attribute level rather than at the service level. Because access control is exercised at such a low level, an administrator can exercise much tighter and precise control over how attributes provided by an APS are accessed.

Abstract: A method for using dependency-based grouping to establish class identity comprises categorizing a plurality of classes into a set of class groups based at least in part on one or more dependencies between the classes, and generating metadata to be use for loading the classes, where the metadata includes a mapping between the set of class groups and the plurality of classes. The metadata may also include respective signatures for class groups and/or the individual classes. The method may also include validating, using at least a portion of the metadata, the identity of a particular version of a class of the plurality of classes, prior to loading the version for execution.

Abstract: Embodiments of the present invention provide a system for transferring data between a receiver chip and a transmitter chip. The system includes a set of data path circuits in the transmitter chip and a set of data path circuits in the receiver chip coupled to a shared data channel. In addition, the system includes a set of asynchronous control circuits for controlling corresponding data path circuits in the transmitter chip and receiver chip. Upon detecting the transition of a control signal for an asynchronous control circuit in the transmitter chip, the asynchronous control circuit is configured to enable a transfer of data from the corresponding data path circuit in the transmitter chip across the data channel to a corresponding data path circuit in the receiver chip, and generate a control signal to cause a next asynchronous control circuit to commence the transfer of a data signal.

Abstract: A method for configuration of a program with a plurality of configuration variables to operate on a computer system that includes obtaining a plurality of priority semantics for the plurality of configuration variables, wherein the plurality of priority semantics are heterogeneous, assigning a value for each of the plurality of configuration variables based on the plurality of priority semantics, and configuring the program using the value to operate on the computer system.

Abstract: A method for providing a giant magneto-resistive (GMR) sensor for use in sensing magnetic flux is provided. The method comprises positioning a layer of Cu material between first and second layers of a specified ferromagnetic material. The respective end surfaces of the Cu layer and the first and second layers are initially located in a common plane and in a co-planar relationship with one another. The method further comprises removing an amount of material from the copper layer to form a new end surface thereof that is selectively spaced apart from the common plane and applying a protective coating to the new end surface of the Cu layer to inhibit corrosion of the Cu layer.

Abstract: System and method for designing and implementing Web Services according to a structured methodology and design patterns. Embodiments may incorporate a structured methodology, best practices and design patterns that address reliability, availability and scalability of Web Services architecture. Embodiments may provide mechanisms for integrating heterogeneous technology components into Web Services. Embodiments may provide a vendor-independent Web Services architecture framework and reusable Web Services design patterns, which may be used in creating end-to-end solutions based on past experience and best practices. Embodiments may include design patterns and best practices for delivering Web Services solutions with Quality of Services. One embodiment may provide a Business-to-Business Integration (B2Bi) integration framework for Web Services. Embodiments may provide a Web Security framework and design patterns for designing end-to-end Web Services security.

Abstract: A method and a communicating system to enhance the reliability of communication between devices by protecting against failure of a device, e.g. due to power interruption. Additional data is included in communication primitives transmitted between communicating devices. The additional data relates to state data of the device having generated the additional data. The additional data is used to check the state data. The state data may also be derivable from the additional data upon receiving the additional data back from an other device.

Abstract: By encoding an exception triggering value in storage referenced by an instruction in an otherwise unused slot (e.g., the delay slot of a delayed control transfer instruction or an unused instruction position in a VLIW-based architecture) coinciding with a safe point, an efficient coordination mechanism can be provided for multi-threaded code. Because the mechanism(s) impose negligible overhead when not employed and can be engaged in response to an event (e.g., a start garbage collection event), safe points can be defined at call, return and/or backward branch points throughout mutator code to reduce the latency between the event and suspension of all threads. Though particularly advantageous for thread suspension to perform garbage collection at safe points, the techniques described herein are more generally applicable to program suspension at coordination points coinciding with calls, returns, branches or calls, returns and branches therein.

Abstract: A system for providing a floating point product comprises an analyzer circuit configured to determine a first status of a first floating point operand and a second status of a second floating point operand based upon data within the first floating point operand and data within the second floating point operand respectively. In addition, the system comprises a results circuit coupled to the analyzer circuit. The results circuit is configured to assert a resulting floating point operand containing the product of the first floating point operand and the second floating point operand. Additionally, the results circuit provides a resulting status embedded within the resulting floating point operand.

Abstract: One embodiment of the present invention provides a system that resolves references in an in-place execution file for a platform-independent virtual machine into physical addresses. During operation, the system receives an in-place execution file in which references have been replaced with in-place encoded metadata specifying attributes of the references. The system then resolves a reference by obtaining in-place encoded metadata for the reference from a location in the in-place execution file, using the in-place encoded metadata to determine an address of an associated referent, and then replacing the in-place encoded metadata at the location in the in-place execution file with the address of the referent.

Abstract: A computer system may employ a first memory virtualization and corresponding virtual-to-physical address translation technique for a first application executing on a processor and a second memory virtualization and corresponding virtual-to-physical address translation technique for a second application executing on the same processor transparent to the first application. Different virtualization and corresponding translation techniques may be employed on a per-thread basis, rather than a per-application basis. Different virtualization and corresponding translation techniques may be employed for accesses to different ranges of virtual or corresponding physical addresses. Different virtualization and corresponding translation techniques may employ different page sizes. A first or second virtualization and corresponding translation technique may include page-based, segment-based, or function-based virtual-to-physical address translation.

Abstract: In one embodiment, a processor comprises execution circuitry and a translation lookaside buffer (TLB) coupled to the execution circuitry. The execution circuitry is configured to execute a store instruction having a data operand; and the execution circuitry is configured to generate a virtual address as part of executing the store instruction. The TLB is coupled to receive the virtual address and configured to translate the virtual address to a first physical address. Additionally, the TLB is coupled to receive the data operand and to translate the data operand to a second physical address. A hardware accelerator is also contemplated in various embodiments, as is a processor coupled to the hardware accelerator, a method, and a computer readable medium storing instruction which, when executed, implement a portion of the method.

Abstract: Data address profiling allows determination of sources of code execution hindrance with different perspectives of memory references and allows correlation of sampled runtime events and memory reference objects, such as cache lines. Associating sampled runtime events with data addresses provides for efficient and targeted optimization of code with respect to data addresses and physical and/or logical memory reference objects (e.g., memory segments, heap variables, variable instances, stack variables, etc.). An instruction instance is identified in relation to a sampled runtime event. A data address is determined from the instruction instance. From the determined address, a memory reference object is ascertained.

Abstract: A method including obtaining an operational status of a first processor core, where the first processor core is associated with a plurality of processor cores located on a chip; configuring a first IO block of a package design based on the operational status of the first processor core, where the package design is based on a fully functional chip; and configuring a stackup of the package design after configuring the first IO block for use with the chip.

Abstract: An application server may initialize network services asynchronously and/or on-demand. Some services may be initialized during startup of the application server, while initialization of other services may be delayed. The application server may report that the services are initialized before they are actually initialized and may be configured to receive client requests for non-initialized services. When a client request is received, the application server may delay processing the client request either until the requested service is initialized or until all services are initialized. The application server may hold a received client request in a network layer until the requested service, and possibly other services on which the requested service depends, is initialized able to process the client request. Delaying initialization of some application server network services may result in a faster startup or restart time for the application server.

Abstract: A computer readable medium including instructions executable by a processor to perform a method, the method including obtaining a packet by a load balancer, obtaining queued packet information for a plurality of target hosts operatively connected to the load balancer, selecting the one of the plurality of target hosts using the queued packet information, and sending the packet to the selected target host using a first communication channel between the load balancer and the selected target host.

Abstract: A system and method for generating a probability distribution indicating the probability of a range of performance ratios between computer systems. Benchmark and/or other testing results are obtained for both computer systems. For each test, a ratio of one system's performance to the other is calculated. The ratios and/or testing results may be weighted. From the performance ratios, a histogram is produced to indicate the probabilities of achieving the various ratios. Based on the distribution of probabilities, a particular performance ratio can be predicted with a corresponding level of confidence, and used for capacity planning or configuring a computing environment.

Abstract: According to one embodiment of the invention, a technique is provided for relocating the contents of kernel pages in a manner similar to techniques used for relocating the contents of user pages. Before the contents of a source page are moved to a target page, for each entry of a plurality of entries that correspond to the source page, it is determined whether a mapping indicated in that entry is a mapping into kernel virtual memory address space or user virtual memory address space. If the mapping is into user virtual memory address space, then the entry is marked invalid. If the mapping is into kernel virtual memory address space, then the mapping is marked suspended. Marking an entry suspended causes processes and threads that try to access the entry's mapping to wait until the entry is no longer marked suspended. Consequently, kernel pages may be distributed among all computing system boards.

Abstract: A mechanism is disclosed for building and using an index for searching computer programs. The method involves building an index based on two or more computer programs that have a different set of semantics for defining symbols. More particularly, a determination is made as to whether a first symbol in a first program is being defined in the first program. The determination is based upon an understanding of a first set of semantics that the first program has for defining symbols. In response to a determination that the first symbol is being defined in the first program, the first symbol is added to a definition index, along with an indicator of the first program, to indicate that the first symbol is defined in the first program.