Abstract: Method and apparatus for converting language text input into a different language text output. One embodiment may be configured to convert Pinyin into written Chinese language text. Embodiments may provide a language input mechanism that accepts phonetic language input text and generates written language output text, and that also accepts modifications to existing input text and automatically corrects the corresponding output text. Embodiments may display one or more alternative output text words and/or sentences as candidates for the transliteration of the input text. The candidate output words may be ranked according to calculated probabilities, with a most probable candidate appearing first. The user may select from the candidate output text to build an output sentence that represents the correct or preferred transliteration of the input text. A lexicon, language model and history cache of previously selected output text words may be referenced in determining the probabilities of candidate output words.

Abstract: A client module downloaded by web browser from a server receives authentication information to open a smart card in a card reader and to initiate a secure network connection to a first server module running on a server. The client module calls a second server module running on the server. And the client module receives a new application for the smart card. Then the client module causes the smart card to delete an old application and load the new application. Each of the operations performed by client module occurs in a single session.

Abstract: Method and software architecture for providing data-change alerts corresponding to data changes in a data system to external (of the data system) applications. A computer user interface is provided to enable a user to identify user interface (UI) objects corresponding to a user interface of an application used to access the data system to provide data-change alert support for. For example, the UI objects may comprise screens, views, applets, fields, and columns. Based on the alert-enabled UI objects, data-change alert triggers are generated to monitor for data-change events (e.g., inserts, updates, and deletes) that cause changes to data in the data system corresponding to those alert-enabled UI objects. In response to data changes in the data system corresponding to alert-enabled UI objects, appropriate triggers are executed to initiate generation of data-change alerts comprising data values that have been changed. The data-change alerts are then pushed to the external application.

Abstract: A method, and associated system, for enforcing compliance with data definitions in an information or conceptual model. The method includes storing a set of data models, which define model parameter definitions, having a content based on data definitions of the conceptual model. A validator is positioned between a registry service and services use data definitions to define their data parameters. The registry service stores registered services in a service repository. The validator processes a registration request from one of the services that includes the data definitions for the parameters of the service. The processing includes accessing the data models and comparing each of the data definitions to a corresponding model parameter definition. When the registration request is determined compliant with the conceptual model, the service is deployed to the service registry. Typically, only registration requests processed by the validator are deployed to the service registry.

Abstract: A method for executing an executable file. The method includes executing instructions in the executable file by a first process, receiving a write request from a second process to write to the executable file, generating an anonymous file from the executable file in response to the write request, executing the anonymous file by the first process, and accessing the executable file by the second process.

Abstract: In transactional memory systems, transactional aborts due to conflicts between concurrent threads may cause system performance degradation. A compiler may attempt to minimize runtime abort rates by performing code transformations and/or other optimizations on a transactional memory program in an attempt to minimize store-commit intervals. The compiler may employ store deferral, hoisting of long-latency operations from within a transaction body and/or store-commit interval, speculative hoisting of long-latency operations, and/or redundant store squashing optimizations. The compiler may perform optimizing transformations on source code and/or on any intermediate representation thereof (e.g., parse trees, un-optimized assembly code, etc.). The compiler may preemptively avoid naïve target code constructions.

Abstract: A socket package is provided to be positioned between a circuit package and a printed circuit board (PCB). The socket package includes a plurality of interconnects, to connect portions of the circuit package to portions of the PCB. Additionally, a plurality of capacitors are included with the socket package. The capacitors connect the interconnects provided to the socket package, and may be provided in lieu of capacitors in a circuit package, thus decreasing the complexity and build cost of the circuit package.

Abstract: A method for debugging applications in a development environment. The method may include terminating a thread when a breakpoint is encountered when debugging an application. The method may also include saving input and outputs from an external server invocation.

Abstract: A server interconnect system includes a first server node operable to send and receive messages and a second server nodes operable to send and receive messages. The system further comprises a first interface unit in communication with the first server node and a second interface unit in communication with the second server node. The first interface unit has a first set of message send registers and a first set of message receive registers. Similarly, the second interface unit has a second set of message send registers and a second set of message receive registers. The server interconnect system also includes a communication switch that receives and routes a message from the first or second server nodes when either of the first or second registers indicates that a valid message is ready to be sent. A method implemented by the server interconnect system is also provided.

Abstract: In general, the invention relates to replicating a source file system stored on a first memory by obtaining a first unread entry from a changelog associated with the source file system, querying the source file system using the first unread entry to obtain a current first object file status, a current first object file path, a current first parent directory status, and a current first parent directory path, determining, based on the querying, whether a first object file on the source file system has changed at some time after the execution of the first unread entry, if the first object file has not changed, performing a first action on a target file system, and if the first object file has changed, performing a second action on the target file system.

Abstract: Systems and methods for integrating multiple best effort hardware transactional support mechanisms, such as Read Set Monitoring (RSM) and Best Effort Hardware Transactional Memory (BEHTM), in a single transactional memory implementation are described. The best effort mechanisms may be integrated such that the overhead associated with support of multiple mechanisms may be reduced and/or the performance of the resulting transactional memory implementations may be improved over those that include any one of the mechanisms, or an un-integrated collection of multiple such mechanisms. Two or more of the mechanisms may be employed concurrently or serially in a single attempt to execute a transaction, without aborting or retrying the transaction. State maintained or used by a first mechanism may be shared with or transferred to another mechanism for use in execution of the transaction. This transfer may be performed automatically by the integrated mechanisms (e.g., without user, programmer, or software intervention).

Abstract: A system for controlling energy usage in a server having a processor, where the system includes a memory for storing energy cost information, and a controller for determining a transaction rate for the processor. The controller is also for determining a cumulative of energy expended by the server based on the determined transaction rate for each of a number of available power level states (P-states) for operation of the processor, and for selecting one of the available P-states for operation of the processor based on the determined cumulative energy expended and the stored energy cost information.

Abstract: A system and method for using business services within a customer relationship management (CRM) application. Business services are objects that encapsulate and simplify the use of some set of functionality. The CRM application includes an object manager that manages business objects as well as business services. Business objects are associated with data stored in the application database. Business services operate or act upon business objects to achieve a particular goal. Business services include methods that can be invoked and properties that maintain information about the state of a process during execution.

Abstract: A method for mapping an information directory such as a LDAP directory tree to a relational database structure. The method includes accessing an information directory, which has a number of data entries at nodes of its tree structure and each of these entries may include a number of attributes defined by one or more object classes. The method includes storing a distinguished name (DN2ID) index table including generating records the data entries that include a DN field containing the entry's attributes. The method includes forming a relational table associated with each of the object classes defined for the information directory, and the records of the relational tables may be linked to the records/entries of the DN2ID index table. The method may include determining an entry identifier for each of the entries of the directory and storing these in the records of the DN2ID index table and in the relational tables.

Abstract: A processing system is disclosed. The processing system comprises a first integrated circuit. The first integrated circuit includes a processor core, a display interface and memory controller coupled to a first bus interface. The display interface is adapted to display graphical information generated by a graphics engine. A graphics engine is not on the first integrated circuit. The processing system includes a second bus interface for allowing communication with the first integrated circuit via the first bus interface. The second bus interface is adapted to allow for communication to a graphics engine.

Abstract: A processor including instruction support for implementing the Camellia block cipher algorithm may issue, for execution, programmer-selectable instructions from a defined instruction set architecture (ISA). The processor may include a cryptographic unit that may receive instructions for execution. The instructions include one or more Camellia instructions defined within the ISA. In addition, the Camellia instructions may be executable by the cryptographic unit to implement portions of a Camellia cipher that is compliant with Internet Engineering Task Force (IETF) Request For Comments (RFC) 3713. In response to receiving a Camellia F( )-operation instruction defined within the ISA, the cryptographic unit may perform an F( ) operation, as defined by the Camellia cipher, upon a data input operand and a subkey operand, in which the data input operand and subkey operand may be specified by the Camellia F( )-operation instruction.

Abstract: Systems and methods for providing single cycle movement of data between a floating-point register file (FRF) and a general purpose or integer register file (IRF) of a microprocessor system are provided. The system may include an integer execution unit operative to execute instructions with single cycle latency, a floating-point execution unit, a working register file (WRF), an FRF, and an IRF. To achieve the single cycle movement functionality, the integer execution unit may physically own the WRF, IRF, and FRF, and may monitor and control any dependencies between them. Thus, since the integer execution unit has direct read access to both the IRF and the FRF, data may be moved between the two register files using the single cycle operation of the integer execution unit, without the need to store and load the data from memory.

Abstract: A method for cooling electronic equipment. The method including propagating air through a first electronic component of the electronic equipment into a first enclosed area, where propagating the air through the first electronic component cools the first electronic component, circulating a refrigerant in a cooling loop, where the cooling loop comprises a heat exchanger, and propagating the air out of the first enclosed area by passing through the heat exchanger into a second enclosed area, where the air is cooled by passing through the heat exchanger.

Abstract: A method for validating a data value, the method including receiving a data value entered into an input field of a software application, obtaining a validation rule corresponding to the input field from a validation rule book, executing the validation rule to determine a validation result, and returning the validation result to the software application.

Abstract: Systems and methods for efficient out-of-order dynamic deallocation of entries within a shared storage resource in a processor. A processor comprises a unified pick queue that includes an array configured to dynamically allocate any entry of a plurality of entries for a decoded and renamed instruction. This instruction may correspond to any available active threads supported by the processor. The processor includes circuitry configured to determine whether an instruction corresponding to an allocated entry of the plurality of entries is dependent on a speculative instruction and whether the instruction has a fixed instruction execution latency. In response to determining the instruction is not dependent on a speculative instruction, the instruction has a fixed instruction execution latency, and said latency has transpired, the circuitry may deallocate the instruction from the allocated entry.