Abstract: Techniques for implementing the hybrid execution of continuous and scheduled queries are provided. In some examples, a query engine may be initialized with relational data from at least a first source. For example, the first source may include a database or other system that can provide historical data. Additionally, the query engine may be enabled to provide query results based at least in part on the relational data from at least the first source and streaming data from at least a second source. In some examples, the second source may be a data stream.

Abstract: An apparatus including a first computer for detecting a scrolling event is provided. The first computer is configured to store a destination array including pixels corresponding to a present set of data for a second computer and to store a source array including pixels corresponding to an expected set of data for a display on the second computer after a scrolling event. The first computer is configured to determine hash values of pixel pairs for the pixels of the destination array and to determine hash values of pixel pairs for the pixels of the source array. The first computer is configured to determine a final scroll offset between the pixels in the destination array and the source array based on the hash values. The first computer is configured to transmit pixels indicative of the expected set of data to the second computer based on the final scroll offset for display.

Abstract: Using silicon photonic components that support a single polarization, the output of an optical receiver is independent of the polarization of an optical signal. In particular, using a polarization-diversity technique, the two orthogonal polarizations in a single-mode optical fiber are split in two and processed independently. For example, the two optical signals are provided by a polarizing splitting grating coupler. Subsequently, a wavelength channel in the two optical signals is selected using a wavelength-selective filter (for example, using a ring resonator or an echelle grating) and combined at an optical detector (such as a photo-detector) to achieve polarization-independent operation.

Abstract: A system for migrating first data objects from a first repository product to a second repository product exports the first data objects from the first repository product into a schema. The schema describes a logical model of the first data objects. The system maps the first data objects to second data objects of the second repository product. The system trims the first data objects. Trimming comprises performing data modification on the first data objects so that the first data objects can be migrated to the second repository product. The system also creates placeholders for the first data objects for later deployment binding.

Abstract: Systems and methods for providing an enterprise crawl and search framework are described, wherein the system includes features such as use with middleware and enterprise application environments, pluggable security, search development tools, user interfaces, and governance. In accordance with an embodiment, the system includes an enterprise crawl and search framework which abstracts an underlying search engine, provides a common set of application programming interfaces for developing search functionalities, and allows the framework to serve as an integration layer between one or more enterprise search engine and one or more enterprise application. A computing environment can be used to display an administration interface for use in administering the framework.

Abstract: Systems and methods for reducing power consumption during data transport across multiple processors when link utilization is low. In a multi-node system, at least one of two nodes may indicate low utilization for a given link between them. In response to further determining no enabled link between the two nodes is over utilized, each of the two nodes may remove the given link from consideration for being scheduled to receive data for transfer and turn off the given link when no more transactions are scheduled for the given link. Disabled links may be re-enabled when high utilization is detected on at least one link between the two nodes.

Abstract: A mutable multilevel data structure representing a graph structure may include multiple read-only levels and a single writable level. Each read-only level may include a vertex table (which includes references to edge tables on the same level or a different level containing elements of adjacency lists for some vertices) and an edge table (which includes elements of adjacency lists that changed since the previous read-only level). A hybrid variant may switch between a performance-optimized variant (whose edge tables include complete adjacency lists for vertices whose edge sets were modified) and a space-optimized variant (whose edge tables include only newly added adjacency list elements). The vertex tables and/or the writable level may be implemented using copy-on-write arrays, each including an indirection table and multiple fixed-sized data pages. Computations may be run on the read-only levels or on the writable level and read-only levels.

Abstract: In a multiple-wavelength laser source, a multiple-mode laser outputs a set of wavelengths in a range of wavelengths onto an optical waveguide, where a spacing between adjacent wavelengths in the set of wavelengths is smaller than a width of channels in an optical link. Furthermore, a set of ring-resonator filters in the multiple-wavelength laser source, which are optically coupled to the optical waveguide, output corresponding subsets of the set of wavelengths for use in the optical link based on free spectral ranges and quality factors of the set of ring-resonator filters. These subsets may include one or more groups of wavelengths, with another spacing between adjacent groups of wavelengths that is larger than the width of the given channel in the optical link. In addition, the one or more groups of wavelengths may include one or more wavelengths, with the spacing between adjacent wavelengths in the given group of wavelengths.

Abstract: A tape head having offset transducer spans between adjacent modules of the tape head that serves to maintain the balance between debris removal and reduced magnetic layer/recording device spacing on the one hand and reduced tape/tape head friction on the other hand. In one aspect, opposite edges of each module are relatively sharper adjacent the transducer span and relatively rounded (e.g., less sharp) away from the transducer span. The sharp edges reduce magnetic spacing loss and scrape debris off of the tape while the rounded edges reduce or eliminate contact between the tape and the head in regions where no transducer spans are present and thus where no tape writing or reading would be taking place.

Abstract: Implementations of the present disclosure involve a system and method for simulating a storage cluster testing system. The method and system includes a processor configured to instructions stored on a memory to produce a simulation interface. The simulation interface includes an abstraction layer that receives verbs from a test driver and passes the verbs to one of two or more plugins. The plugins may include a synthetic plugin configured to translate the verbs into one or more command and send commands to a simulated storage appliance that is a computing device with relatively lower performance than an actual storage appliance. The simulated storage appliance may act in place of two storage appliances clustered to form a storage cluster. The simulated storage appliance forms a simulated storage cluster. The simulated storage cluster simulates the performance of the verb on by the storage cluster.

Abstract: Embodiments include systems and methods for determining link margins of data communications channels in a communications system. For example, an integrated circuit includes a large number of input/output (I/O) channels, each with a respective receiver system. The receiver system can include equalizer subsystems, that attempt to adapt to their respective channels (e.g., to eliminate inter-symbol interference). Embodiments manipulate filter tap weights in the equalizer subsystems to controllably close its respective data eye until a failure region is detected, indicating that a threshold I/O error rate has been exceeded. Thus, for each channel, the filter tap weights can be allowed to fully adjust to identify fully adapted values, and they can be forced into a failure region to identify failure region values. A link margin for each channel can be derived for each channel according to the difference between the fully adapted and failure region values of the filter tap weights.

Abstract: A processor, method, and medium for using vector operations to compress selected elements of a vector. An input vector is compared to a criteria vector, and then a subset of the plurality of elements of the input vector are selected based on the comparison. A permutation vector is generated based on the locations of the selected elements and then the permutation vector is used to permute the selected elements of the input vector to an output vector. The selected elements of the input vector are stored in contiguous locations in the leftmost elements of the output vector. Then, the output vector is stored to memory and a pointer to the memory location is incremented by the number of selected elements.

Abstract: A multi-level interposer plate and a multi-chip module (MCM) that includes the multi-level interposer plate are described. First surfaces and second surfaces in different regions of the multi-level interposer plate have associated, different thicknesses. Moreover, first micro-spring connectors and second micro-spring connectors are respectively disposed on the first surfaces and the second surfaces. In the MCM, a given one of the first surfaces of the multi-level interposer plate faces a bridge chip in a first layer in an array of chips in the MCM so that first connectors, disposed on the bridge chip, mechanically and electrically couple to the first micro-spring connectors. Similarly, a given one of the second surfaces of the multi-level interposer plate faces an island chip in a second layer in the array of chips so that second connectors, disposed on the island chip, mechanically and electrically couple to the second micro-spring connectors.

Abstract: An apparatus may include a first memory, a control circuit, a first address comparator and a second address comparator. The first memory may store a table, which may include an expected address of a next memory access and an offset to increment a value of the expected address. The control circuit may read data at a predicted address in a second memory and store the read data in a cache. The first and second address comparators may determine if a value of a received address is between the value of the expected address and the value of the expected address minus a value of the offset. The control circuit may also modify the value of the offset responsive to determining the value of the received address is between the value of the expected address and the value of the expected address minus the value of the offset.

Abstract: Systems and methods for information retrieval are provided that permit users and/or processing entities to access and define synthetic data, synthetic objects, and/or synthetic groupings of data in one or more collections of information. In one embodiment, data access on an information retrieval system can occur through an interpretation layer which interprets any synthetic data against data physically stored in the collection. Synthetic data can define virtual data objects, virtual data elements, virtual data attributes, virtual data groupings, and/or data entities that can be interpreted against data that may be stored physically in the collection of information. The system and methods for information retrieval can return results from the one or more collections of information based not only on the data stored, but also on the virtual data generated from interpretation of the stored data.

Abstract: In general, the invention relates to a non-transitory computer readable medium comprising instructions, which when executed by a processor perform a method. The method includes obtaining lock overhead times for a plurality of threads, generating a set of thread groups, wherein each of the plurality of threads is assigned to one of the plurality of thread groups based on the lock overhead times, allocating at least one core of a multi-core system to each of the plurality of thread groups, and assigning a time-quantum for each of the plurality of thread groups, wherein the time-quantum for each of the plurality of thread groups corresponds to an amount of time that threads in each of the plurality of thread groups can execute on the at least one allocated core.

Abstract: A method and circuit for reducing a glitch in a memory read latch is disclosed. A read latch circuit includes a first logic gate having a first input coupled to a read bit line and a second input. The read latch circuit further includes a second logic gate coupled to receive as inputs a first enable signal and a delayed version of the first enable signal. The second logic gate is configured to provide a second enable signal to the second input of the first logic gate. The second logic gate is configured to provide a rising edge of the second enable signal after a predetermined delay without a corresponding delay of a falling edge of the second enable signal. The first logic gate provides an output corresponding to a data value received on the read bit line responsive to receiving the rising edge of the second enable signal.

Abstract: A system for selectively disallowing unwinding of a storage library robotic mechanism cable assembly in a direction that would otherwise allow a platform of the robotic mechanism to move downwardly via the force of gravity while at the same time allowing for winding up of the cable assembly and the platform, such as during shipping, manual access, replacement of the robotic mechanism, and/or the like. The system may include a ratchet pawl for engaging between adjacent teeth of a drive assembly of the robotic mechanism and an actuator for selectively moving or allowing for movement of the ratchet pawl into and out of the engaged position. In one embodiment, the system may include an electric switch or the like to sense when the pawl is engaged with the drive assembly.

Abstract: A system may include a processor which may include a cache memory and a Direct Memory Access (DMA) controller, a peripheral device on an I/O expansion bus, and a bus interface coupled to the I/O expansion bus and the processor. The bus controller may determine if data packets sent from the peripheral device to the processor include a DMA write instruction to the cache memory with an optional desired cache location. Upon determining a DMA write instruction to the cache memory is included in the data packet, the bus controller may format the data in the data packet for storage in the cache and either receive the desired cache location or determine an appropriate location within the cache to store the formatted data. The bus controller may determine an alternate location within the cache if the desired location within the cache cannot accept more data from the peripheral device.

Abstract: A system, computer implemented method, and computer program product for analyzing an installation to determine a file system promotion path during an online patching cycle. The method commences by identifying an initial file system and a shadow file system, the shadow file system being at least some duration older than the initial run file system, then analyzing a history of events that occurred in or on the installation during the duration to determine a degree of confidence. Based on the degree of confidence, then selecting the initial file system to be used on the online patching cycle when the confidence value is equal or above a threshold, or selecting the shadow file system to be used in the online patching cycle when the confidence value is below a threshold. The history of events is recorded in forms of a patch list, a log file, or a list of configuration events.