Patents Assigned to Ordos Yuansheng Optoelectronics Co., Ltd.
  • Patent number: 11360361
    Abstract: An array substrate motherboard includes a plurality of array substrates and a plurality of connection lines. Each of the plurality of array substrates includes an electrical test region, and the electrical test region includes a first conductive terminal. The plurality of connection lines are electrically connected to first conductive terminals of electrical test regions of the plurality of array substrates to electrically connect the plurality of array substrates together.
    Type: Grant
    Filed: December 25, 2019
    Date of Patent: June 14, 2022
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Dan Jia
  • Patent number: 11361703
    Abstract: A gate driving unit, a gate driving method, a gate driving circuit, a display panel and a display device are provided. The gate driving unit includes a start terminal, a first gate driving signal output terminal, a second gate driving signal output terminal, a pull-up control node control circuit, a pull-up node control circuit, configured to control a potential of a first pull-up node and a potential of a second pull-up node based on the potential of the pull-up control node, a first gate driving signal output circuit, a second gate driving signal output circuit, and a pull-down node control circuit, configured to control and maintain the potential of the pull-down node under the control of a third clock signal and a fourth clock signal, and control to reset the potential of the pull-down node under the control of the potential of the pull-up control node.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: June 14, 2022
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Peng Liu, Bailing Liu, Fuqiang Li, Zhichong Wang, Jing Feng, Xinglong Luan
  • Patent number: 11362115
    Abstract: The present disclosure relates to the technical field of display. Disclosed are an array substrate and a preparation method therefor, and a display panel and a display device. The array substrate includes: a substrate; multiple gate lines, wherein the gate lines are located on the substrate, and extend along a first direction; multiple data lines, wherein the data lines are located on the substrate, and extend along a second direction, and the gate lines and the data lines intersect to define multiple pixel areas; and a touch-control electrode wiring wherein the touch-control electrode wiring has the same direction as that of the gate lines, and is arranged insulated from the gate lines on a different layer, and the orthographic projection of the touch-control electrode wiring on the substrate at least has an overlapping area with the orthographic projection of part of the gate lines on the substrate.
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: June 14, 2022
    Assignees: Ordos Yuansheng Optoelectronics Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Zhixuan Guo, Fengguo Wang, Yezhou Fang, Feng Li, Xinguo Wu, Hong Liu, Zifeng Wang, Lei Li, Kai Li, Liang Tian, Jing Zhao, Zhengkui Wang, Bo Ma, Haiqin Liang, Peng Liu
  • Patent number: 11355079
    Abstract: An array substrate, a display panel, a display device, and driving methods thereof are provided. The array substrate includes subpixels arranged in an array, and switches. The subpixels include subpixels of a first color, subpixels of a second color, subpixels of a third color, subpixels of a fourth color, in odd rows of subpixels, the subpixels of the first color, the subpixels of the second color, the subpixels of the third color, the subpixels of the fourth color are sequentially arranged; in even rows of subpixels, the subpixels of the third color, the subpixels of the fourth color, the subpixels of the first color, the subpixels of the second color are sequentially arranged; and the subpixels of the first color are white subpixels; the subpixels of the second color are blue subpixels; the subpixels of the third color are green subpixels; the subpixels of the fourth color are red subpixels.
    Type: Grant
    Filed: January 20, 2021
    Date of Patent: June 7, 2022
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhen Wang, Wenwen Qin, Mingchao Ma, Wenchao Han, Jian Sun, Yun Qiao, Jun Fan
  • Patent number: 11347334
    Abstract: An array substrate, a method for fabricating the same, and a display device are provided. The array substrate includes: a base substrate; touch electrode wiring including a first conductive layer and a second conductive layer, where the first conductive layer is between the base substrate and the second conductive layer, the second conductive layer includes at least one first via hole to expose the first conductive layer, and the first conductive layer has a higher electrical conductivity than that of the second conductive layer; a planarization layer on the second conductive layer, where the planarization layer includes at least one first touch electrode contact hole; and touch electrode on the planarization layer, where the touch electrode is connected with the first conductive layer through the first touch electrode contact hole and the first via hole.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: May 31, 2022
    Assignees: Ordos Yuansheng Optoelectronics Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Cenhong Duan, Dawei Shi, Fengguo Wang, Feng Li, Hong Liu, Xinguo Wu, Lu Yang, Wentao Wang, Zifeng Wang, Bo Ma, Yuanbo Li, Zhixuan Guo, Jing Zhao, Haiqin Liang
  • Patent number: 11342460
    Abstract: A thin film transistor, a method for fabricating the same, an array substrate, a display panel, and a display device are provided. The thin film transistor includes a substrate, and an active layer on the substrate, wherein the active layer includes a poly-silicon layer and has a channel region and two electrode connection regions respectively on two sides of the channel region, and the channel region includes a plurality of lightly drain doping segments, which are spaced apart along from one of the electrode connection regions to the other electrode connection region, and channel segments located between the lightly drain doping segments.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: May 24, 2022
    Assignees: Ordos Yuansheng Optoelectronics Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Zhixuan Guo, Fengguo Wang, Yezhou Fang, Xinguo Wu, Hong Liu, Kai Li, Liang Tian, Shiyu Zhang
  • Patent number: 11333139
    Abstract: The embodiments of the present disclosure relates a cryopump including a pump housing including a suction port, a cold head located within the pump housing, a shielding element located within the pump housing and covering the cold head, a baffle at the suction port, the baffle including a gas passage with an inlet and an outlet, an orthographic projection of the baffle to the cross section of the pump housing completely covers an orthographic projection of the suction port thereto, the gas passage includes a first portion and a second portion intersecting with each other, the inlet is defined by one end of the first portion, the outlet is defined by one end of the second portion.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: May 17, 2022
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Jindong Liu, Qingwu Kong, Xiongfei Guo
  • Patent number: 11334202
    Abstract: The disclosure provides a touch panel, a control method and a control device thereof, and a display device. The touch panel comprises at least one first touch area and at least one second touch area, wherein a density of touch electrodes in the first touch area is greater than a density of touch electrodes in the second touch area.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: May 17, 2022
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Bo Wang, Fuqiang Li
  • Patent number: 11333922
    Abstract: A display panel, a method for fabricating the same, and a display device are provided. The display panel includes: a first substrate, and a plurality of pixels in an array on the first substrate, where each pixel includes a plurality of sub-pixels in different colors, and interference filters one-to-one corresponding to the sub-pixels are arranged on light emitting sides of the sub-pixels, and configured to transmit light in narrow bands in the same colors as the corresponding sub-pixels. The interference filters corresponding to the colors of light emitted from the sub-pixels are arranged on the light emitting sides of the sub-pixels so that the light in the narrow bands in the corresponding colors are transmitted, thus improving the saturation of the colors of the emitted light, extending the display color gamut of the display panel, and optimizing the display effect.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: May 17, 2022
    Assignees: Ordos Yuansheng Optoelectronics Co., Ltd., BOE Technology Group Co., Ltd.
    Inventor: Yu Yuan
  • Patent number: 11337308
    Abstract: A display panel and a display apparatus containing the display panel are disclosed. The display panel includes a substrate, a circuit structure, and a first bonding adhesive. The substrate has a first bonding area. The circuit structure has a second bonding area that opposingly faces the first bonding area. The first bonding adhesive is arranged between, and configured to contact the first bonding area and the second bonding area. At least one of the first bonding area or the second bonding area comprises at least one first indentation. The first bonding adhesive at least partially fills one or more of the at least one first indentation.
    Type: Grant
    Filed: December 25, 2018
    Date of Patent: May 17, 2022
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chunghao Cheng, Kun Guo
  • Patent number: 11328652
    Abstract: A gate driving unit, a gate driving method, a gate driving circuit, a display panel and a display device are provided. The gate driving unit includes a start terminal, a first gate driving signal output terminal, a second gate driving signal output terminal, a pull-up control node control circuit, a pull-up node control circuit, configured to control a potential of a first pull-up node and a potential of a second pull-up node based on the potential of the pull-up control node, a first gate driving signal output circuit, a second gate driving signal output circuit, and a pull-down node control circuit, configured to control and maintain the potential of the pull-down node under the control of a third clock signal and a fourth clock signal, and control to reset the potential of the pull-down node under the control of the potential of the pull-up control node.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: May 10, 2022
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Peng Liu, Bailing Liu, Fuqiang Li, Zhichong Wang, Jing Feng, Xinglong Luan
  • Patent number: 11329075
    Abstract: An array substrate, its fabricating method, a display panel and a display device are disclosed. The method includes forming an active layer on a substrate, forming a gate layer on a side of the active layer facing or away from the substrate; forming an interlayer dielectric layer on a side of the active layer away from the substrate, which includes a first, second, third and fourth film stacked in this order in a direction away from the substrate; forming a via hole extending from the interlayer dielectric layer to the active layer; forming a source and drain layer on a side of the interlayer dielectric layer away from the substrate, and in a region not covered by the source and drain layer, removing the fourth film in the interlayer dielectric layer at a same time as forming the source and drain layer.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: May 10, 2022
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Lulu Ye, Lei Yao, Kai Zhang, Dawei Shi, Nana Gao, Panpan Zhang
  • Patent number: 11329508
    Abstract: A display substrate, a display device and a wireless charging method are provided. The display substrate includes: a display area and a peripheral area located outside the display area. The peripheral area includes a circuit binding area. The display substrate includes a base substrate and a wireless charging antenna disposed on the base substrate. The wireless charging antenna includes a power receiving coil and a connection lead. The connection lead is connected to the power receiving coil, and the power receiving coil is connected to the circuit binding area.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: May 10, 2022
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yanwei Ren, Yue Shan, Yu Feng, Min Liu
  • Patent number: 11322100
    Abstract: The present disclosure provides a gray scale setting method, a display substrate and a display apparatus, and relates to the field of display technology. The gray scale setting method of the present disclosure applied to a display substrate. The display substrate has a display area and a non-display area. The display substrate includes an edge pixel on a boundary between the display area and the non-display area, and the edge pixel includes a first sub-area pixel within the display area and a second sub-area pixel within the non-display area. The method includes: acquiring an area ratio of the first sub-area relative to the edge pixel; determining a relative transmittance of the edge pixel according to the area ratio of the first sub-area relative to the edge pixel; and determining a display gray scale for the edge pixel according to the determined relative transmittance.
    Type: Grant
    Filed: July 19, 2019
    Date of Patent: May 3, 2022
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Kai Chen, Xuelu Wang, Ruichao Liu, Wei Wei, Peimao Li
  • Patent number: 11315882
    Abstract: An alignment mark includes an alignment region, a peripheral region and a shielding region. The alignment region has an outer contour; the peripheral region is disposed around at least a part of the outer contour of the alignment region; the shielding region is disposed around at least a part of the outer contour of the alignment region and is non-overlapped with the peripheral region; and the alignment region and the shielding region are opaque, and the peripheral region is at least partially transparent.
    Type: Grant
    Filed: September 7, 2018
    Date of Patent: April 26, 2022
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Qinglin Ma, Baojie Zhao, Conghui Zhou, Li Wang, Jian Li, Yan Zhao, Xiang Hui, Xiongwei Wang, Chunhong Ma
  • Patent number: 11315471
    Abstract: A shift register unit, a driving device, a display device and a driving method are provided. The shift register unit includes an input circuit, a first pull-up node reset circuit, an output circuit, an output reset circuit, a pull-down node control circuit and a power-on initialization circuit. The power-on initialization circuit is configured to reset the pull-up node in response to a power-on initialization signal.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: April 26, 2022
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lele Cong, Jian Sun, Zhen Wang
  • Patent number: 11314115
    Abstract: An array substrate, a manufacturing method of the same, a display panel and a display device are provided. The array substrate includes a display region and a peripheral region around the display region, a photosensitive layer is in the display region and a peripheral circuit is in the peripheral region. The array substrate further includes an alignment film covering the photosensitive layer and the peripheral circuit. The array substrate further includes an insulating layer between the peripheral circuit and the alignment film. The alignment film is a photo alignment film, and the insulating layer is configured to absorb and/or reflect an alignment light adopted for performing photoalignment to obtain the alignment film.
    Type: Grant
    Filed: June 5, 2018
    Date of Patent: April 26, 2022
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yang Xie, Weixin Meng, Jian Guo
  • Patent number: 11307707
    Abstract: A scan shift circuit and its driving method, a touch shift circuit and its driving method, a gate driving circuit, a touch driving circuit and a display apparatus are disclosed. The scan shift circuit includes an input circuit, a reset circuit, a latch control circuit and a scan signal output circuit. The touch shift circuit includes an input circuit, a reset circuit, a latch control circuit, a cascade signal output circuit, a touch driving circuit and a touch signal output circuit.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: April 19, 2022
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventor: Fei Huang
  • Patent number: 11307491
    Abstract: A mask, a mask assembly, an exposure machine, a method for testing shadowing effect on a window, and a photolithography method are provided. The mask includes a light transmission area; a functional window provided at a side of the light transmission area; and at least one of a first detection mark and a second detection mark; wherein the first detection mark is flushed with a border of the functional window adjacent to an interior of the mask; and the second detection mark is disposed between the profile of the light transmission area and the functional window.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: April 19, 2022
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Jiabin Cui, Li Wang, Zhibin Li, Pengfei Liang, Chang Liu, Peng Chen
  • Patent number: 11308838
    Abstract: A shift register includes a first transistor, a second transistor, a pull-up node and a switch sub-circuit. A control electrode of the first transistor is connected to a signal input terminal, a first electrode of the first transistor is connected to a first voltage terminal, and a second electrode of the first transistor is connected to a first control node. A control electrode of the second transistor is connected to a reset signal terminal, a first electrode of the second transistor is connected to a second voltage terminal, and a second electrode of the second transistor is connected to the first control node. The switching sub-circuit is connected to the first control node and the pull-up node, and is configured to control a line between the first control node and the pull-up node to be closed and opened.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: April 19, 2022
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhichong Wang, Fuqiang Li, Jing Feng, Peng Liu, Xinglong Luan