Patents Assigned to ORIGIN QUANTUM COMPUTING TECHNOLOGY CO., LTD.
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Patent number: 12361309Abstract: Disclosed are a method, device, storage medium and electronic device for data reading, applied to a pre-constructed quantum random access memory (QRAM) architecture for accessing data, wherein the QRAM architecture is a binary tree structure and comprises the following nodes: N layers of subtree node and one layer of leaf node, the N being an address length; the method includes: determining an address represented by a quantum state distributedly stored in each layer of subtree node; and moving, according to the address, data stored in the leaf node to the upper layer of subtree node via a first preset quantum circuit, until data corresponding to the address is output at a subtree node at the root of the binary tree structure.Type: GrantFiled: May 26, 2021Date of Patent: July 15, 2025Assignee: Origin Quantum Computing Technology Co., Ltd.Inventors: Ye Li, Ningbo An, Menghan Dou
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Patent number: 12182664Abstract: Embodiments of the disclosure provide a quantum chip system, a quantum computing processing system and an electronic apparatus, wherein one quantum chip system includes at least one first qubit, each first qubit includes at least two control electrodes, and a first event register for controlling the control electrode, wherein each first event register is configured for storing a control signal of the control electrode, and each first qubit corresponds to at least two first event registers.Type: GrantFiled: July 17, 2020Date of Patent: December 31, 2024Assignee: ORIGIN QUANTUM COMPUTING TECHNOLOGY CO., LTD.Inventors: Weicheng Kong, Yongjie Zhao
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Publication number: 20240357945Abstract: Disclosed are a fabrication method for a superconducting circuit and a superconducting quantum chip. The fabrication method includes: determining, on a substrate, a first junction region located between a first electrical element and a second electrical element, and a second junction region located between a first conductive plate and a second conductive plate that are formed in advance; forming a Josephson junction in the second junction region; detect an electrical parameter of the Josephson junction, and determining whether the electrical parameter is within a target parameter range; if yes, separating the Josephson junction through cutting, and moving the Josephson junction to the first junction region; and forming a first connection structure connecting the first superconducting layer to the first electrical element and a second connection structure connecting the second superconducting layer to the second electrical element.Type: ApplicationFiled: May 10, 2023Publication date: October 24, 2024Applicant: ORIGIN QUANTUM COMPUTING TECHNOLOGY CO., LTD.Inventors: Liangliang MA, Bing YOU, Nianci WANG, Jie ZHENG, Wenshu LIU
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Publication number: 20240095565Abstract: Disclosed are a method, device, storage medium and electronic device for data reading, applied to a pre-constructed quantum random access memory (QRAM) architecture for accessing data, wherein the QRAM architecture is a binary tree structure and comprises the following nodes: N layers of subtree node and one layer of leaf node, the N being an address length; the method includes: determining an address represented by a quantum state distributedly stored in each layer of subtree node; and moving, according to the address, data stored in the leaf node to the upper layer of subtree node via a first preset quantum circuit, until data corresponding to the address is output at a subtree node at the root of the binary tree structure.Type: ApplicationFiled: May 26, 2021Publication date: March 21, 2024Applicant: Origin Quantum Computing Technology Co., Ltd.Inventors: Ye Li, Ningbo An, Menghan Dou
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Publication number: 20240037438Abstract: Disclosed are a superconducting quantum chip structure and a fabrication method for a superconducting quantum chip. The superconducting quantum chip structure includes a first structural member, a second structural member, and a support and connection member, where the first structural member is provided with a qubit, a read cavity, and a first connection terminal, the qubit is coupled to the read cavity, and the qubit is electrically connected to the first connection terminal; the second structural member is provided with a signal transmission line and a second connection terminal electrically connected to each other; and two ends of the support and connection member are electrically connected to the first connection terminal and the second connection terminal, respectively, and the support and connection member is configured to transmit a control signal received on the signal transmission line to the qubit.Type: ApplicationFiled: May 9, 2023Publication date: February 1, 2024Applicant: ORIGIN QUANTUM COMPUTING TECHNOLOGY CO., LTD.Inventor: Yongjie ZHAO
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Publication number: 20240037433Abstract: Disclosed are a method and device for constructing a quantum circuit of a QRAM architecture, the QRAM architecture being configured for accessing data and being a binary tree structure, the method including: partitioning the binary tree structure into basic circuit structures, wherein a basic circuit structure comprises address bits and data bits of one subtree node and data bits of two child nodes in the lower layer of the one subtree node; determining qubits required for a basic quantum circuit to be constructed, according to qubits included in the basic circuit structure; determining an input and an output of the basic quantum circuit to be constructed, according to action relationships between the qubits required for the basic quantum circuit to be constructed; and constructing a basic quantum circuit corresponding to the basic circuit structure, according to the input and the output using the required qubits and quantum logic gates.Type: ApplicationFiled: May 26, 2021Publication date: February 1, 2024Applicant: Origin Quantum Computing Technology Co., Ltd.Inventors: YE LI, Ningbo An Hefei, Menghan Dou
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Publication number: 20230325697Abstract: Disclosed are a method and an apparatus for amplitude estimation of a quantum circuit. The method includes: calculating a first difference value between a current angle upper limit value and a current angle lower limit value corresponding to a to-be-estimated amplitude of a target quantum state, and determining the first difference value as a target difference; determining, a next angle amplification factor and a next flag parameter corresponding to a next iteration step; amplifying the target quantum circuit by the next angle amplification factor; calculating a second difference value between a next angle upper limit value and a next angle lower limit value of the to-be-estimated amplitude, and determining the second difference value as a target difference; and determining, based on an angle upper limit value and an angle lower limit value that reach the precision threshold, a probability estimated value corresponding to a to-be-estimated quantum bit.Type: ApplicationFiled: May 1, 2023Publication date: October 12, 2023Applicant: ORIGIN QUANTUM COMPUTING TECHNOLOGY CO., LTD.Inventors: Yewei YUAN, Ye LI, Ningbo AN, Menghan DOU
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Publication number: 20230276719Abstract: Disclosed are a quantum chip and a fabrication method therefor. The quantum chip includes a base substrate on which signal transmission lines are formed; and at least one insulating substrate located on the base substrate, where a qubit and a through hole penetrating through the insulating substrate are formed on the insulating substrate, a metal piece is formed in the through hole, and two ends of the metal piece are electrically connected to the signal transmission lines and the qubit, respectively.Type: ApplicationFiled: April 27, 2023Publication date: August 31, 2023Applicant: ORIGIN QUANTUM COMPUTING TECHNOLOGY CO., LTD.Inventors: Liangliang MA, Wenshu LIU, Jie ZHENG, Nianci WANG, Bing YOU