Patents Assigned to Origin Quantum Computing Technology (Hefei) Co., Ltd.
  • Publication number: 20250077922
    Abstract: Disclosed are a mapping method for a quantum program and a quantum chip, a quantum computer, and a computer. The method comprises: obtaining topological structures of physical bits in a quantum chip, a logic gate set of an initial quantum program, and an initial mapping relationship between logic bits and the physical bits; determining an execution timing of the logic gate set of the initial quantum program bits; according to the topological structures of physical bits and the initial mapping relationship, adjusting the mapping relationships between the logic bits and the physical bits corresponding to each logic gate so as to obtain the final mapping relationship; and according to the final mapping relationship, constructing the to-be-mapped quantum program equivalent to the initial quantum program to minimize the number of SWAP quantum logic gates in the to-be-mapped quantum program.
    Type: Application
    Filed: August 16, 2022
    Publication date: March 6, 2025
    Applicant: Origin Quantum Computing Technology (Hefei) Co. Ltd.
    Inventors: Menghan Dou, Dongyi Zhao, Yuan Fang, Wentao Wang, Jing Wang
  • Publication number: 20250047281
    Abstract: Disclosed are a synchronous triggering system, a quantum control system and a quantum computer. The synchronous triggering system comprises a central control device, several routing boards and several functional boards. It guarantees the synchronous triggering of the triggering signals by means of a three-stage triggering synchronization system. In the first stage, the central control device provides several sets of triggering signals to corresponding routing boards, and adjusts an initial time point for each set of triggering signals to output so that each chassis receives the triggering signals concurrently. In the second stage, communication lines from each routing board to the several functional boards are of equal length. In the third stage, the triggering signals arrive at several data-processing devices simultaneously after being processed under the AND-operation of an AND-gate chip.
    Type: Application
    Filed: October 27, 2022
    Publication date: February 6, 2025
    Applicant: Origin Quantum Computing Technology (Hefei) Co., Ltd.
    Inventors: Weicheng Kong, Yongjie Zhao, Xuebai Li, Liangchen Fan
  • Patent number: 12207568
    Abstract: Disclosed are a fabrication method for a superconducting circuit and a superconducting quantum chip. The fabrication method includes: determining, on a substrate, a first junction region located between a first electrical element and a second electrical element, and a second junction region located between a first conductive plate and a second conductive plate that are formed in advance; forming a Josephson junction in the second junction region; detect an electrical parameter of the Josephson junction, and determining whether the electrical parameter is within a target parameter range; if yes, separating the Josephson junction through cutting, and moving the Josephson junction to the first junction region; and forming a first connection structure connecting the first superconducting layer to the first electrical element and a second connection structure connecting the second superconducting layer to the second electrical element.
    Type: Grant
    Filed: May 10, 2023
    Date of Patent: January 21, 2025
    Assignee: Origin Quantum Computing Technology (Hefei) Co., Ltd
    Inventors: Liangliang Ma, Bing You, Nianci Wang, Jie Zheng, Wenshu Liu
  • Patent number: 12160233
    Abstract: A quantum circuit, a quantum chip, and a quantum computer. The quantum circuit includes qubits, adjacent qubits being coupled, and each of the qubits including: a first capacitor, a first end of the first capacitor being grounded; a second capacitor, a first end of the second capacitor and the first end of the first capacitor being commonly grounded; and a first device, including a first squid and a third capacitor that are connected in parallel, wherein parallel-connected first ends of the first squid and the third capacitor are connected to a second end of the first capacitor, and parallel-connected second ends of the first squid and the third capacitor are connected to a second end of the second capacitor. According to the present disclosure, parameters of at least one of a plurality of capacitors in a qubit circuit can be adjusted, so that the design of the capacitor is more flexible and less spatially limited, which facilitates design and layout of other circuit structures.
    Type: Grant
    Filed: December 7, 2023
    Date of Patent: December 3, 2024
    Assignee: ORIGIN QUANTUM COMPUTING TECHNOLOGY (HEFEI) CO., LTD.
    Inventors: Weicheng Kong, Song Li, Zhenquan Yang, Junxiu Bu
  • Patent number: 12131227
    Abstract: Disclosed are a method and an apparatus for determining a multi-qubit measurement result, and a quantum computer. In the method, during determining multi-qubit measurement results, qubit readout feedback signals are first acquired for N associated qubits, then quantum state measurement values of the respective qubits are acquired based on the qubit readout feedback signals, and finally, measurement results of the N associated qubits are determined based on information weights of the respective qubits and the quantum state measurement values of the respective qubits.
    Type: Grant
    Filed: November 3, 2023
    Date of Patent: October 29, 2024
    Assignee: Origin Quantum Computing Technology (Hefei) Co., Ltd
    Inventors: Weicheng Kong, Hanqing Shi
  • Publication number: 20240356532
    Abstract: Disclosed are a quantum state information processing system, a quantum measurement and control system, and a quantum computer. In this system, a sampling module is used to perform sampling processing on an analog signal collected from a qubit, a frequency mixing module is used to perform mixing processing on the sampled signal, a demodulation module is used to perform demodulation processing on a mixed signal, and a determining module is used to perform state classification on a demodulated signal by using a state classification equation, so as to acquire quantum state information.
    Type: Application
    Filed: October 30, 2023
    Publication date: October 24, 2024
    Applicant: Origin Quantum Computing Technology (Hefei) Co., Ltd
    Inventors: Yongjie ZHAO, Weicheng KONG
  • Publication number: 20240341202
    Abstract: A superconducting quantum circuit and a fabrication method thereof, as well as a quantum computer, belong to the field of quantum computing technology. The superconducting quantum circuit comprises a first superconducting element (21) and a second superconducting element (22) formed on a substrate (1), and a superconducting quantum interference device. The superconducting quantum interference device comprises: a bottom electrode (241) integrally connected to the second superconducting element (22); a barrier layer (242) located on the bottom electrode (241); and a top electrode (31) that is electrically connected at one end to the first superconducting element (21) and forms a partial overlapping area with the barrier layer (242) to obtain a Josephson junction at the overlapping area.
    Type: Application
    Filed: January 25, 2024
    Publication date: October 10, 2024
    Applicant: Origin Quantum Computing Technology (Hefei) Co., Ltd
    Inventors: Liangliang MA, Bing YOU
  • Publication number: 20240338213
    Abstract: A quantum computing platform adaptation method and apparatus, and a quantum computer operating system are provided. The method includes: acquiring a quantum program to be executed and a topological structure of a quantum chip corresponding to a quantum computing platform, wherein the topological structure is configured to represent physical qubits in an electronic device and a connection relationship between the physical qubits; and adapting the quantum program to the quantum computing platform based on the topological structure. According to some embodiments of the present disclosure, scalability of the quantum program can be improved, so that the quantum program can be adapted to different quantum computing platforms and run on different quantum chips.
    Type: Application
    Filed: October 20, 2023
    Publication date: October 10, 2024
    Applicant: ORIGIN QUANTUM COMPUTING TECHNOLOGY (HEFEI) CO., LTD
    Inventors: Menghan Dou, Yuan Fang, Jing Wang, Dongyi Zhao
  • Publication number: 20240329162
    Abstract: Disclosed are a probe apparatus, and a measurement method and a measurement system of a junction resistance of a superconducting qubit. The probe apparatus is configured to measure a superconducting quantum chip, and includes a probe set, a probe control mechanism, and a power supply module; the probe set includes two probes that are independent; the probe control mechanism is configured to control the probe set to be connected to an oxide layer on a surface of an electrode of a Josephson junction on the superconducting quantum chip; and the power supply module is configured to apply an electrical breakdown signal to two probes, to break down the oxide layer, so that the probe set forms a conductive connection with the electrode of the Josephson junction.
    Type: Application
    Filed: June 6, 2024
    Publication date: October 3, 2024
    Applicant: Origin Quantum Computing Technology (Hefei) Co., Ltd
    Inventors: Yongjie ZHAO, Xiansheng JIN, Yao LIU, Hui ZHANG, Fu ZHANG
  • Patent number: 12086569
    Abstract: A method and device for quantum division operation with precision. The method includes: obtaining dividend data and divisor data to be operated, transforming the dividend data into a first target quantum state, and transforming the divisor data into a second target quantum state; for the first target quantum state and the second target quantum state, iteratively executing quantum state evolution corresponding to a subtraction operation, counting the number of executions of the subtraction operation until the dividend data is reduced to a negative number, and outputting a finally obtained counting result as integer part of a quotient of dividing the dividend data by the divisor data; for a current first target quantum state and a current second target quantum state, iteratively executing quantum state evolution corresponding to fractional part operation of the quotient; and outputting a finally obtained quantum state on a qubit with preset precision bits.
    Type: Grant
    Filed: September 17, 2021
    Date of Patent: September 10, 2024
    Assignee: Origin Quantum Computing Technology (Hefei) Co., Ltd.
    Inventors: Ye Li, Menghan Dou
  • Patent number: 12086690
    Abstract: A quantum computer architecture system, including: a quantum processor, including a plurality of qubits; a first integration apparatus configured to implement an execution signal and aggregation of execution results of a first quantity of qubits on the quantum processor; and a central control apparatus configured to acquire bit information of to-be-executed qubits on the quantum processor and to-be-executed information of each of the to-be-executed qubits, assign the to-be-executed information to one or more the first integration apparatuses according to the bit information and the first quantity, and receive the aggregation of the execution results from the one or more the first integration apparatuses. According to the present disclosure, integration and scalability of a quantum computer can be improved.
    Type: Grant
    Filed: October 17, 2023
    Date of Patent: September 10, 2024
    Assignee: ORIGIN QUANTUM COMPUTING TECHNOLOGY (HEFEI) CO., LTD
    Inventors: Weicheng Kong, Xuebai Li
  • Patent number: 12079691
    Abstract: The present disclosure provides a quantum convolution operator, comprising: a quantum state encoding module, a quantum entanglement module, a quantum convolution kernel module, a measuring module, and a computing module; the quantum state encoding module is configured to encode a current group of input data onto qubits; the quantum entanglement module is configured to associate quantum state information of different qubits; the quantum convolution kernel module is configured to extract feature information corresponding to the quantum state information; the measuring module is configured to measure a quantum state of a preset qubit and obtain a corresponding amplitude; the computing module is configured to compute a convolution result corresponding to the current group of input data according to the measured quantum state and its amplitude.
    Type: Grant
    Filed: February 23, 2022
    Date of Patent: September 3, 2024
    Assignee: Origin Quantum Computing Technology (Hefei) Co., Ltd.
    Inventors: Menghan Dou, Yuan Fang, Zhaohui Zhou, Hanchao Wang, Lei Li
  • Publication number: 20240289664
    Abstract: Disclosed are a method and an apparatus for processing a data simulation task, an electronic device, and a storage medium. The method includes: obtaining target data of a data simulation task, where the data simulation task is simulating Hamiltonian; performing an operation process based on the target data and a specified operation condition, to obtain computing data of the data simulation task; decomposing the computing data into a set of finite number of quantum gates; and constructing, based on the set of the finite number of quantum gates, a quantum circuit to perform simulation, and in a case that a similarity between a circuit matrix corresponding to the quantum circuit and the computing data meets a specified condition, using simulated data obtained through simulation based on the quantum circuit as the target data.
    Type: Application
    Filed: May 1, 2024
    Publication date: August 29, 2024
    Applicant: Origin Quantum Computing Technology (Hefei) Co., Ltd
    Inventors: Yuan FANG, Boying CHEN, Jing WANG, Menghan DOU
  • Publication number: 20240289289
    Abstract: Disclosed are a method and an apparatus for determining a measurement result of multiple qubits, and a quantum computer. The method comprises: separately acquiring, based on a sequence number of each to-be-read qubit, a readout feedback signal of a data bus corresponding to the to-be-read qubit; acquiring quantum state information of each to-be-read qubit based on the corresponding readout feedback signal; separately acquiring a quantum state measurement value of each to-be-read qubit based on the corresponding quantum state information and a readout criterion of the to-be-read qubit; and determining a measurement result target value of to-be-read qubits based on an information weight and the quantum state measurement value of each to-be-read qubit.
    Type: Application
    Filed: February 6, 2024
    Publication date: August 29, 2024
    Applicant: Origin Quantum Computing Technology (Hefei) Co., Ltd
    Inventors: Shuangsheng FANG, Weicheng KONG, Hanqing SHI
  • Publication number: 20240265290
    Abstract: Disclosed are a method and an apparatus for determining a multi-qubit measurement result, and a quantum computer. In the method, during determining multi-qubit measurement results, qubit readout feedback signals are first acquired for N associated qubits, then quantum state measurement values of the respective qubits are acquired based on the qubit readout feedback signals, and finally, measurement results of the N associated qubits are determined based on information weights of the respective qubits and the quantum state measurement values of the respective qubits.
    Type: Application
    Filed: November 3, 2023
    Publication date: August 8, 2024
    Applicant: Origin Quantum Computing Technology (Hefei) Co., Ltd
    Inventors: Weicheng KONG, Hanqing SHI
  • Publication number: 20240231947
    Abstract: Disclosed are a quantum computer operating system and a quantum computer. In the operating system, if the quantity of the free qubits on a certain chip in the quantum chip cluster is not less than the quantity required by the quantum computing task, selecting a first quantum bit whose reading fidelity is within a preset range from the free qubits and obtaining a nearby pair of quantum bits based on the community detection algorithm and the greedy algorithm, and combining them to form a qubit topological structure until the number of quantum bits is equal to the number required by the quantum computing task. Finally, mapping the quantum computing task to be processed with the qubit topological structure to execute the quantum computing task to be processed.
    Type: Application
    Filed: December 29, 2023
    Publication date: July 11, 2024
    Applicant: Origin Quantum Computing Technology (Hefei) Co., Ltd.
    Inventors: Yuan Fang, Wentao Wang, Dongyi Zhao, Jing Wang, Menghan Dou
  • Patent number: 12026590
    Abstract: Disclosed are a quantum computing task processing method and a quantum computing task processing apparatus, and a quantum computer operating system. The method includes: cutting a quantum circuit corresponding to a quantum computing task into a plurality of quantum sub-circuits based on an evolution process of a quantum state of a qubit in the quantum circuit; separately preparing an initial quantum state of a qubit in each of the quantum sub-circuits; measuring a qubit, obtained after the initial quantum state is prepared, in each of the quantum sub-circuits, to obtain measurement results of each of the quantum sub-circuits; and combining the measurement results of each of the quantum sub-circuits to obtain computation results of the quantum computing task.
    Type: Grant
    Filed: November 28, 2023
    Date of Patent: July 2, 2024
    Assignee: Origin Quantum Computing Technology (Hefei) Co., Ltd
    Inventors: Lei Yu, Wentao Wang, Dongyi Zhao, Jing Wang
  • Patent number: 12016253
    Abstract: Disclosed are a quantum chip test structure and a fabrication method therefor, and a test method and a fabrication method for a quantum chip. The quantum chip test structure includes: a superconducting Josephson junction and a connection structure of the superconducting Josephson junction that are located on a substrate; a first isolation layer located on the connection structure, where a connection window penetrating through the first isolation layer is formed in the first isolation layer; a second isolation layer located on the first isolation layer, where a deposition window is formed in the second isolation layer; and an electrical connection portion located in the connection window and an electrical connection layer located in the deposition window, and the electrical connection layer is configured to implement electrical contact with a test device.
    Type: Grant
    Filed: May 10, 2023
    Date of Patent: June 18, 2024
    Assignee: Origin Quantum Computing Technology (Hefei) Co., Ltd
    Inventor: Yongjie Zhao
  • Publication number: 20240193322
    Abstract: Disclosed are a carrier transport simulation method, a carrier transport simulation apparatus, a medium, and an electronic device. A physical simulation model, and an initial condition and/or a boundary condition for carrier transport in a semiconductor device are determined; a mathematical physical equation correspondingly for solving the physical simulation model is determined; and a carrier density in the semiconductor device is determined based on the initial condition and/or the boundary condition, and the mathematical physical equation, to implement a simulation of carrier transport in the semiconductor device, so as to implement a simulation of carrier transport in a semiconductor device.
    Type: Application
    Filed: January 24, 2024
    Publication date: June 13, 2024
    Applicant: Origin Quantum Computing Technology (Hefei) Co., Ltd
    Inventor: Yongjie ZHAO
  • Publication number: 20240176386
    Abstract: Disclosed are a clock synchronization apparatus, a clock synchronization method, a quantum measurement and control system, and a quantum computer. The clock synchronization apparatus includes a benchmark clock, a first clock generator, function boards, and second clock generators. The first clock generator is in a communication connection to the second clock generators, and one corresponding second clock generator is disposed on each of the function boards. The benchmark clock provides a first benchmark clock signal to the first clock generator providing a synchronization signal used to synchronize output clocks of all the second clock generators to the second clock generators based on the first benchmark clock signal. The second clock generators output, based on the synchronization signal, a work clock signal required by the function boards. The plurality of function boards generate, based on the work clock signal, a first signal required to perform corresponding work by using qubits.
    Type: Application
    Filed: February 5, 2024
    Publication date: May 30, 2024
    Applicant: Origin Quantum Computing Technology (Hefei) Co., Ltd
    Inventors: Liangchen FAN, Xuebai LI, Weicheng KONG