Patents Assigned to Oriol, Inc.
  • Publication number: 20080038992
    Abstract: A chemical mechanical polishing (CMP) apparatus and method for polishing semiconductor wafers utilizes multiple wafer carriers that are transferred to different positions about a polishing pad to polish at least one semiconductor wafer while another semiconductor wafer is being loaded onto or unloaded from one of the wafer carriers. The different positions include multiple polishing positions and one or more loading/unloading positions. In some embodiments, the CMP apparatus is configured such that a semiconductor wafer is polished at a loading/unloading position. The CMP apparatus may also be configured to continuously polish one or more semiconductor wafers while the wafer carriers are being transferred to different positions. Thus, the CMP apparatus can continuously process the semiconductor wafers without significant idle periods. Consequently, in these embodiments, the efficiency of the CMP apparatus is significantly increased.
    Type: Application
    Filed: March 5, 2007
    Publication date: February 14, 2008
    Applicant: Oriol, Inc.
    Inventor: In Jeong
  • Patent number: 7225864
    Abstract: A temperature control system for a semiconductor processing facility includes a common cooling unit for controlling the temperature of a cooling fluid and multiple remote temperature control modules that separately control temperatures of multiple process components. The temperature control modules are near process components and include a circulation loop for cooling fluid from the common cooling unit and a circulation loop for a heat transfer fluid received from a component. A heat exchanger within the temperature control module allows heat transfer between heat transfer fluid and cooling fluid, thereby cooling the component. A heat source may also be within the temperature control module to heat the heat transfer fluid and the component. The cooling unit may be a refrigeration unit that provides compressed refrigerant to the temperature control modules which may include an upstream thermal expansion valve and a downstream refrigerant flow control valve that form an evaporation chamber.
    Type: Grant
    Filed: April 6, 2001
    Date of Patent: June 5, 2007
    Assignee: Oriol Inc.
    Inventor: In Kwon Jeong
  • Patent number: 7186165
    Abstract: A chemical mechanical polishing (CMP) apparatus and method for polishing semiconductor wafers utilizes multiple wafer carriers that are transferred to different positions about a polishing pad to polish at least one semiconductor wafer while another semiconductor wafer is being loaded onto or unloaded from one of the wafer carriers. The different positions include multiple polishing positions and one or more loading/unloading positions. In some embodiments, the CMP apparatus is configured such that a semiconductor wafer is polished at a loading/unloading position. The CMP apparatus may also be configured to continuously polish one or more semiconductor wafers while the wafer carriers are being transferred to different positions. Thus, the CMP apparatus can continuously process the semiconductor wafers without significant idle periods. Consequently, in these embodiments, the efficiency of the CMP apparatus is significantly increased.
    Type: Grant
    Filed: July 28, 2006
    Date of Patent: March 6, 2007
    Assignee: Oriol, Inc.
    Inventor: In Kwon Jeong
  • Patent number: 7180036
    Abstract: A temperature control system having a re-circulation loop that uses valves to selectively circulate a temperature control fluid through a cooling system, through a heating system, or through a through passage so as to controlling the temperature of the temperature control fluid, which, in turn, controls the temperature of a target. A temperature sensor monitors the target's temperature. A controller controls valve operation in response to the temperature measured by the temperature sensor to obtain a predetermined target temperature. Beneficially, the controller controls the target's temperature according to a predetermined temperature profile. Continuous etching along a predetermined temperature profile is possible.
    Type: Grant
    Filed: November 8, 2004
    Date of Patent: February 20, 2007
    Assignee: Oriol, Inc.
    Inventor: Boris Atlas
  • Publication number: 20060264156
    Abstract: A chemical mechanical polishing (CMP) apparatus and method for polishing semiconductor wafers utilizes multiple wafer carriers that are transferred to different positions about a polishing pad to polish at least one semiconductor wafer while another semiconductor wafer is being loaded onto or unloaded from one of the wafer carriers. The different positions include multiple polishing positions and one or more loading/unloading positions. In some embodiments, the CMP apparatus is configured such that a semiconductor wafer is polished at a loading/unloading position. The CMP apparatus may also be configured to continuously polish one or more semiconductor wafers while the wafer carriers are being transferred to different positions. Thus, the CMP apparatus can continuously process the semiconductor wafers without significant idle periods. Consequently, in these embodiments, the efficiency of the CMP apparatus is significantly increased.
    Type: Application
    Filed: July 28, 2006
    Publication date: November 23, 2006
    Applicant: Oriol, Inc.
    Inventor: In Jeong
  • Patent number: 7104867
    Abstract: A chemical mechanical polishing (CMP) apparatus and method for polishing semiconductor wafers utilizes multiple wafer carriers that are transferred to different positions about a polishing pad to polish at least one semiconductor wafer while another semiconductor wafer is being loaded onto or unloaded from one of the wafer carriers. The different positions include multiple polishing positions and one or more loading/unloading positions. In some embodiments, the CMP apparatus is configured such that a semiconductor wafer is polished at a loading/unloading position. The CMP apparatus may also be configured to continuously polish one or more semiconductor wafers while the wafer carriers are being transferred to different positions. Thus, the CMP apparatus can continuously process the semiconductor wafers without significant idle periods. Consequently, in these embodiments, the efficiency of the CMP apparatus is significantly increased.
    Type: Grant
    Filed: December 22, 2005
    Date of Patent: September 12, 2006
    Assignee: Oriol Inc.
    Inventor: In Kwon Jeong
  • Patent number: 7069984
    Abstract: A temperature control system for multiple process components in a semiconductor processing facility includes a common cooling unit for controlling the temperature of a cooling fluid and multiple remote temperature control modules in fluid communications with the common cooling unit that separately control the temperature of the multiple process components. The remote temperature control modules are located near the process components and each remote temperature control module includes a circulation loop for the cooling fluid from the common cooling unit and a circulation loop for a heat transfer fluid that received from a process component. A heat exchanger within the remote temperature control module allows heat transfer between the heat transfer fluid and the cooling fluid, thereby cooling the process component. A heat source may also be included within the remote temperature control module to provide heat to the heat transfer fluid and to the process component.
    Type: Grant
    Filed: February 8, 2001
    Date of Patent: July 4, 2006
    Assignee: Oriol Inc.
    Inventor: In Kwon Jeong
  • Patent number: 7004815
    Abstract: A chemical mechanical polishing (CMP) apparatus and method for polishing semiconductor wafers utilizes multiple wafer carriers that are transferred to different positions about a polishing pad to polish at least one semiconductor wafer while another semiconductor wafer is being loaded onto or unloaded from one of the wafer carriers. The different positions include multiple polishing positions and one or more loading/unloading positions. In some embodiments, the CMP apparatus is configured such that a semiconductor wafer is polished at a loading/unloading position. The CMP apparatus may also be configured to continuously polish one or more semiconductor wafers while the wafer carriers are being transferred to different positions. Thus, the CMP apparatus can continuously process the semiconductor wafers without significant idle periods. Consequently, in these embodiments, the efficiency of the CMP apparatus is significantly increased.
    Type: Grant
    Filed: June 10, 2005
    Date of Patent: February 28, 2006
    Assignee: Oriol, Inc.
    Inventor: In Kwon Jeong
  • Patent number: 6949177
    Abstract: A system and method for processing semiconductor wafers using different wafer processes utilizes multiple processing assemblies to efficiently perform these wafer processes. The wafer processes performed by the processing assemblies may vary with respect to operating parameters or the types of wafer processes, which allows customization of the wafer processes. Each of the processing assemblies is configured to sequentially process two or more semiconductor wafers at different processing positions by sequentially transferring the semiconductor wafers to the different processing positions using a wafer transfer carousel. As the semiconductor wafers are processes at one of the processing assemblies, the processed semiconductor wafers are sequentially transferred to the next processing assembly in an efficient manner. The sequential processing of the semiconductor wafers at each of the processing assemblies and the sequential transferring of the wafers contribute to an increased throughput.
    Type: Grant
    Filed: August 16, 2001
    Date of Patent: September 27, 2005
    Assignee: Oriol Inc.
    Inventor: In Kwon Jeong
  • Patent number: 6949466
    Abstract: A chemical mechanical polishing (CMP) apparatus and method for sequentially polishing multiple semiconductor wafers on a single polishing pad utilizes multiple slurry delivery lines to supply one or more types of polishing solutions to the surface of the polishing pad. The slurry delivery lines are positioned to direct the polishing solution or solutions to different polishing positions of the polishing pad. The use of multiple slurry delivery lines allows the CMP apparatus to polish the semiconductor wafers at different polishing positions of the polishing pad using different types of polishing solutions.
    Type: Grant
    Filed: September 18, 2001
    Date of Patent: September 27, 2005
    Assignee: Oriol Inc.
    Inventor: In Kwon Jeong
  • Patent number: 6949395
    Abstract: A method of forming a light emitting diode includes forming a transparent substrate and a GaN buffer layer on the transparent substrate. An n-GaN layer is formed on the buffer layer. An active layer is formed on the n-GaN layer. A p-GaN layer is formed on the active layer. A p-electrode is formed on the p-GaN layer and an n-electrode is formed on the n-GaN layer. A reflective layer is formed on a second side of the transparent substrate. A scribe line is formed on the substrate for separating the diodes on the substrate. Also, a cladding layer of AlGaN is between the p-GaN layer and the active layer.
    Type: Grant
    Filed: October 22, 2001
    Date of Patent: September 27, 2005
    Assignee: Oriol, Inc.
    Inventor: Myung Cheol Yoo
  • Patent number: 6942545
    Abstract: A chemical mechanical polishing (CMP) apparatus and method for polishing semiconductor wafers utilizes multiple wafer carriers that are transferred to different positions about a polishing pad to polish at least one semiconductor wafer while another semiconductor wafer is being loaded onto or unloaded from one of the wafer carriers. The different positions include multiple polishing positions and one or more loading/unloading positions. In some embodiments, the CMP apparatus is configured such that a semiconductor wafer is polished at a loading/unloading position. The CMP apparatus may also be configured to continuously polish one or more semiconductor wafers while the wafer carriers are being transferred to different positions. Thus, the CMP apparatus can continuously process the semiconductor wafers without significant idle periods. Consequently, in these embodiments, the efficiency of the CMP apparatus is significantly increased.
    Type: Grant
    Filed: April 20, 2001
    Date of Patent: September 13, 2005
    Assignee: Oriol, Inc.
    Inventor: In Kwon Jeong
  • Patent number: 6905398
    Abstract: A chemical mechanical polishing tool, apparatus and method. The polishing tool includes a central polishing assembly comprised of a central pad mount on a central shaft. That central pad mount beneficially retains a center polishing pad. Also included is a ring polishing assembly comprised of a ring pad mount with a central aperture on a ring shaft with a central aperture. The ring pad mount beneficially retains a ring polishing pad having a central aperture. The central polishing assembly and the ring polishing assembly beneficially rotate and move axially independently of one another. The apparatus includes the CMP polishing tool and a rotating polishing table. The method includes rotating a semiconductor wafer on the rotating polishing table. Then, selectively and independently moving a solid center polishing pad having an axis of rotation and/or an axially aligned ring-shaped polishing pad into contact with the surface of the semiconductor wafer.
    Type: Grant
    Filed: September 10, 2001
    Date of Patent: June 14, 2005
    Assignee: Oriol, Inc.
    Inventor: In Kwon Jeong
  • Patent number: 6841802
    Abstract: Light emitting LEDs devices comprised of LED chips that emit light at a first wavelength, and a thin film layer over the LED chip that changes the color of the emitted light. For example, a blue LED chip can be used to produce white light. The thin film layer beneficially consists of a florescent material, such as a phosphor, and/or includes tin. The thin film layer is beneficially deposited using chemical vapor deposition.
    Type: Grant
    Filed: June 26, 2002
    Date of Patent: January 11, 2005
    Assignee: Oriol, Inc.
    Inventor: Myung Cheol Yoo
  • Patent number: 6835118
    Abstract: An apparatus according to the principles of the present invention includes a rotatable platen, a rigid plate member with a top surface and a bottom surface, includes pin members coupled to the rigid plate member which can be inserted into guide openings positioned within the rotatable platen, and a vacuum channel formed within the platen that enables removable mounting the rigid plate member to a top surface of the rotatable platen. The vacuum channel includes a cavity in the top surface of the platen. The rigid plate member adhesively holds the polishing pad to form a rigid plate assembly. A vacuum source coupled to the vacuum channel can be activated to create a vacuum within the vacuum channel to attract the rigid plate member to the platen. The platen can then used to polish work pieces contacting the polishing pad on the top surface of the rigid plate member.
    Type: Grant
    Filed: December 14, 2001
    Date of Patent: December 28, 2004
    Assignee: Oriol, Inc.
    Inventors: David Berkstresser, In Kwon Jeong
  • Patent number: 6822202
    Abstract: A temperature control system having a re-circulation loop that uses valves to selectively circulate a temperature control fluid through a cooling system, through a heating system, or through a through passage so as to controlling the temperature of the temperature control fluid, which, in turn, controls the temperature of a target. A temperature sensor monitors the target's temperature. A controller controls valve operation in response to the temperature measured by the temperature sensor to obtain a predetermined target temperature. Beneficially, the controller controls the target's temperature according to a predetermined temperature profile. Continuous etching along a predetermined temperature profile is possible.
    Type: Grant
    Filed: March 15, 2002
    Date of Patent: November 23, 2004
    Assignee: Oriol, Inc.
    Inventor: Boris Atlas
  • Patent number: 6818532
    Abstract: Thinning and dicing substrates using inductively coupled plasma reactive ion etching (ICP RIE). When dicing, a hard photo-resist pattern or metal mask pattern that defines scribe lines is formed on a sapphire substrate or on a semiconductor epitaxial layer, beneficially by lithographic techniques. Then, the substrate is etched along the scribe lines to form etched channels. An etching gas comprised of BCl3 and/or BCl3/Cl2 gas is used (optionally, Ar can be added). Stress lines are then produced through the substrate along the etched channels. The substrate is then diced along the stress lines. When thinning, a surface of a substrate is subjected to inductively coupled plasma reactive ion etching (ICP RIE) using BCl3 and/or BCl3/Cl2 gas, possibly with some Ar. ICP RIE is particularly useful when working sapphire and other hard substrates.
    Type: Grant
    Filed: April 9, 2002
    Date of Patent: November 16, 2004
    Assignee: Oriol, Inc.
    Inventors: Geun-young Yeom, Myung cheol Yoo, Wolfram Urbanek, Youn-joon Sung, Chang-hyun Jeong, Kyong-nam Kim, Dong-woo Kim
  • Patent number: 6744196
    Abstract: Light emitting LEDs devices comprised of LED chips that emit light at a first wavelength, and a tinted thin film layer over the LED chip that changes the color of the emitted light. For example, a blue-light emitting LED chip can be used to produce white light. The tinted thin film layer beneficially consists of ZnSe, CeO2, Al2O3, or Y2O3:Ce that is deposited using a chemical vapor deposition process, such as metal organic chemical vapor deposition (MOCVD), atomic layer chemical vapor deposition (ALD), plasma enhanced MOCVD, plasma enhanced ALD, and/or photo enhanced CVD. Suitable CVD precursors include Alkoxide, &bgr;-dikeonate, Metalloscene, Alkys, DMZn, DEZe, H2Se, DMSe, TbuSe, and DESe.
    Type: Grant
    Filed: December 11, 2002
    Date of Patent: June 1, 2004
    Assignee: Oriol, Inc.
    Inventor: Hyeong Tag Jeon
  • Publication number: 20030190770
    Abstract: Thinning and dicing substrates using inductively coupled plasma reactive ion etching (ICP RIE). When dicing, a hard photo-resist pattern or metal mask pattern that defines scribe lines is formed on a sapphire substrate or on a semiconductor epitaxial layer, beneficially by lithographic techniques. Then, the substrate is etched along the scribe lines to form etched channels. An etching gas comprised of BCl3 and/or BCl3/Cl2 gas is used (optionally, Ar can be added). Stress lines are then produced through the substrate along the etched channels. The substrate is then diced along the stress lines. When thinning, a surface of a substrate is subjected to inductively coupled plasma reactive ion etching (ICP RIE) using BCl3 and/or BCl3/Cl2 gas, possibly with some Ar. ICP RIE is particularly useful when working sapphire and other hard substrates.
    Type: Application
    Filed: April 9, 2002
    Publication date: October 9, 2003
    Applicant: Oriol, Inc.
    Inventors: Geun-young Yeom, Myung cheol Yoo, Wolfram Urbanek, Youn-joon Sung, Chang-hyun Jeong, Kyong-nam Kim, Dong-woo Kim
  • Patent number: 6586336
    Abstract: A small footprint, integrated and automated semiconductor wafer processing system for planarizing semiconductor wafers. That processing system includes a wafer load station, at least one CMP polishing system, and at least one cleaning system. Also included is at least one wafer unload station and a robotic system. The robotic system, which includes from two to six robotic movers, moves semiconductor wafers through the semiconductor wafer processing system. The semiconductor wafer processing system can also include a buffer system for temporarily holding semiconductor wafers. The buffer system, the robotic system, the cleaning system, the wafer load station, and/or the wafer unload station in some applications are capable of Z-axis motion. CMP polishing systems and cleaning systems can be vertically or linearly stacked.
    Type: Grant
    Filed: August 31, 2001
    Date of Patent: July 1, 2003
    Assignee: Oriol, Inc.
    Inventor: In Kwon Jeong