Abstract: A depletion-mode MESFET is connected between an RF input terminal and ground. The gate is connected to a negative reference voltage via a bias resistor and to ground via a capacitor. A detector couples the input terminal to the gate and includes first and second series diodes and a second resistor connected from between the first and second diodes to ground. A coil is connected between the input terminal and an output terminal connected to a GaAs integrated circuit. A Schottky diode limiter is connected to the output terminal for limiting the voltage of both positive and negative polarities that leak to the output terminal from the transistor.

Abstract: A microwave circuit has an electrical prong for external circuit connection, a ground and a dipole antenna. A circuit board supports the microwave circuit. A heat sink is mounted on the circuit board and has high thermal and electrical conductivity for conducting heat from the electrical circuit and conducting electricity relative to the circuit ground. The heat sink includes a cylindrical boss extending away from the circuit board and having a reduced diameter upper rim and a threaded internal bore having a partially closed bottom. The circuit prong extends into the bore through the bore bottom and is electrically isolated from the heat sink. A cover encloses the circuit, circuit board and heat sink. It has low electrical and thermal conductivity and has an opening into which the reduced diameter upper rim of the heat sink boss extends. An outer sleeve is sized to receive the cover and has high thermal and electrical conductivity and an opening.

Abstract: A double-.pi. network includes a pair of series resistors connected between input and output terminals. A plurality of FETs of different widths and/or in series with resistors, are each connected in parallel with one of the series resistors. Each FET is controlled jointly with an FET of the same gate size associated with the other series resistor, so that select ones of the FETs, or none may be conducting in parallel with the series in-line resistances. Another plurality of intermediate FETs having gates with different widths, are connected in parallel and separately controllable for coupling selectively the junction between the two in-line resistors to ground. Finally, an additional plurality of pairs of FETs couple the input and output terminals to ground. The FETs making up each pair have gates with the same width and are jointly controllable. The FETs in the different pairs have different widths and/or are in series with different sized resistors.

Abstract: A simple cascode configuration of a first, common source transistor coupled to a second, "common" gate transistor is modified by the use of a third transistor conditionally coupling the "common" gate to the source of the second transistor. This coupling is made conditional by a filter network connecting the "common" gate to the source of the second transistor and to the drain of the regulating or third transistor. High pass, low pass and band pass RC network configurations are shown.

Abstract: A detector for generating an output signal representative of the power of an input signal comprises an input capacitor coupled to receive the input signal for transmitting alternating current portions of the input signal. A first common-source FET pair have gate terminals coupled to a temperature-compensating circuit for varying the gate-to-source voltage. The drain of one FET is coupled through an intermediate capacitor to ground. That drain is also coupled to a relatively positive voltage source through a series-connected inductor and resistor. The drain of the second FET is also coupled to the voltage source through a resistor. An output capacitor couples the alternating current signal, at the junction between the resistor associated with the first transistor and the inductor, to ground. A differential amplifier and comparator generates an output signal representative of the difference between the signals appearing on the transistor sides of the two resistors.

Abstract: A cascode transistor configuration includes an input terminal for receiving the input signal, an output terminal for outputting the output signal and bass and emitter terminals connectable to ground. Each of a predetermined plurality of common-base heterojunction bipolar transistors (HBTs) has a base coupled to the base terminal, and a collector coupled to the support output terminal. Each of the predetermined plurality of common-emitter HBTs is associated with one of the common-base HBTs. Each common-emitter HBT also has a base coupled to the input terminal, an emitter coupled to the emitter terminal, and a collector coupled to only the emitter of the associated common-base HBT.

Abstract: A feedback circuit couples a base amplifier output to the amplifier input for feeding back a portion of an amplified input signal. The feedback circuit includes an inductor coupled in series with a variable resistance. The variable feedback resistance is provided by a feedback FET having a gate for receiving a control signal for varying the resistance between the source and drain. The gain of the base amplifier is determined over the predetermined frequency range by the combined impedance of the inductor and resistance. The base amplifier is a field-effect transistor (FET). The feedback inductance is taken from a portion of a coil coupling the drain of the base FET with an output terminal.

Abstract: Input power is applied to an input inductor/capacitor combination. The gates of each of two FETs are connected to the other side of the input inductor. The source of each FET is connected to ground potential. The drain of the first FET is connected to a first output port, and the drain of the second FET is connected to a second output port. A signal input on the drain of one of the FETs is 180.degree. out of phase with the same signal passing through the two FETs to the drain of the other FET. The gate and drain of the first and second FETs have series-connected resistance/inductance feedback networks to give input and output match. A series-connected isolation resistor and inductor are connected between the first and second output ports for feeding signals of reduced amplitude to offset signal feedback through the FETs.

Abstract: A microwave-frequency feedback amplifier circuit has a cascode amplifier with a first field-effect transistor (FET) having a gate for receiving a signal to be amplified, a source coupled to a reference voltage, and a drain. A second FET has a source coupled to the drain of the first FET, a source coupled to the reference voltage, and a drain. A transformer includes a first inductor with a first terminal coupled to the drain of the second FET and a second terminal for outputting an amplified input signal. A second inductor has a first terminal coupled to the second terminal of the first inductor, and a second terminal coupled to the reference voltage. A feedback circuit couples the drain of the second FET to the gate of the first FET.

Abstract: A switch matrix for particular use in microwave monolithic integrated circuits has FET-based switch elements with at least a combined total of two gates. Embodiments include the use of single and dual gate FETs. A preferred embodiment includes cascode-coupled FETs in series with inductances between input and output terminals. The input is taken from an artificial transmission line formed of a plurality of series-coupled inductors or from the junctions of series-coupled pairs of mutually coupled inductors.

Abstract: A monolithic microwave integrated circuit (MMIC) phase shifter is implemented in push-pull configuration with the quadrant selection and vector modulation functions combined. These functions are provided by four sets of adjustable gate-width dual-gate FETs and a pair of lumped element filter networks with a relative differential phase shift of 90.degree..

Abstract: A loaded Lange coupler embodied as an integrated circuit includes interdigitated strip conductors and lumped-element capacitors. The two interdigitated strip conductors couple the input and direct ports together, and the isolated and coupled ports together. A capacitor extends between each of the input and coupled ports and the isolated and direct ports. Further, a capacitor extends between each of the midpoints of the strip conductors and ground. This coupler is formed as an integrated circuit in which the current-to-ground capacitors are substantially in line between opposite port pairs and the strip conductors extend around these capacitors.

Abstract: A push-pull monolithic active isloator having a pair of MESFETs in common-gate and common-drain (source follower), parallel configuration. These two FETs are the same size and a diode is inserted between the gate of the source follower and the source of the common-gate FET. A D.C. blocking capacitor is included at the output. Another FET is coupled between the input and ground and responsive to a control signal to vary the current in a biasing resistor between the drain and gate of the source follower.

Abstract: The disclosed coupler is in a spiral form having approximately 11/4 turns and a length of just over 1/4 wavelength of a designed frequency. The coil includes an interdigitated section with two conductor portions for each conductor. In the overlapped turn portion, the inner conductors are narrower than the outer conductor. Further, conductor pads are disposed adjacent the coupler conductors for connection to associated couplers to vary the bandwidth of the coupler.