Patents Assigned to Pacific Power Source, Inc.
  • Patent number: 9948209
    Abstract: Digital controller architecture for three-phase AC sources includes a phase accumulator, a command control, and a synchronization generator that are utilized to synchronize three controllers. Each controller provides the input to a separate power stage.
    Type: Grant
    Filed: May 19, 2016
    Date of Patent: April 17, 2018
    Assignee: Pacific Power Source, Inc.
    Inventor: Maximiliano O. Sonnaillon
  • Patent number: 9871442
    Abstract: A high voltage AC measurement method and circuit is disclosed to measure with zero offset and mirrored distortion based on hybrid chopping and fully differential signal path. There is a scheme with hybrid chopping and dual mixed signal paths. It applies high frequency chopping to the voltage measurement signal before the low-voltage signal conditioning, then samples and converts it to digital with two simultaneous ADCs, and finally demodulate the chopped signal by software. This technique not only reduces DC errors and drift but also cancels the distortion asymmetry caused by ADC non-linearity. The resultant DC accuracy and resolution can be significantly smaller than 1 LSB.
    Type: Grant
    Filed: May 19, 2016
    Date of Patent: January 16, 2018
    Assignee: Pacific Power Source, Inc.
    Inventor: Maximiliano O. Sonnaillon
  • Patent number: 9812967
    Abstract: A cascaded buck+boost inrush limiter is claimed where the buck converter is only allowed to switch for very short times and stays turned on, or off, during steady state operation. The inrush limiter has a control system having a digital controller and an analog comparator for controlling the buck and boost converters. The system utilizes a single loop current feedback.
    Type: Grant
    Filed: May 19, 2016
    Date of Patent: November 7, 2017
    Assignee: Pacific Power Source, Inc.
    Inventor: Maximiliano O. Sonnaillon
  • Patent number: 9812951
    Abstract: A power factor correction voltage controller is disclosed. In one embodiment, the controller has a linear PI compensator, a moving average filter, a non-linear error circuit, a hysteretic peak control, and an output power feedforward. The power factor correction voltage controller provides regulation of maximum and minimum voltage values but without allowing large periodic fluctuations in the input power/current.
    Type: Grant
    Filed: May 19, 2016
    Date of Patent: November 7, 2017
    Assignee: Pacific Power Source, Inc.
    Inventor: Maximiliano O. Sonnaillon