Patents Assigned to PACT XPP SCHWEIZ AG
  • Patent number: 10885996
    Abstract: A processor comprising an ALU a programmable function unit wherein the functional unit may be programmed to comprise multistage logic.
    Type: Grant
    Filed: January 19, 2016
    Date of Patent: January 5, 2021
    Assignee: PACT XPP SCHWEIZ AG
    Inventor: Martin Vorbach
  • Patent number: 10579584
    Abstract: An integrated data processing core and a data processor are provided on a single integrated circuit and command sequences are forwarded from the data processing core to be executed on the array data processor wherein the command sequences comprise a group of instructions defining an algorithm.
    Type: Grant
    Filed: October 27, 2015
    Date of Patent: March 3, 2020
    Assignee: PACT XPP SCHWEIZ AG
    Inventors: Martin Vorbach, Jürgen Becker, Markus Weinhardt, Volker Baumgarte, Frank May
  • Patent number: 10409765
    Abstract: An array of ALUs and a controlling and controlling unit providing the array sequentially ordered subapplications, wherein an ALU signals completion of execution of a subapplication to the controlling unit, which then provides a next sequential subapplication to the requesting ALU.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: September 10, 2019
    Assignee: PACT XPP SCHWEIZ AG
    Inventors: Martin Vorbach, Armin Nuckel
  • Patent number: 10331194
    Abstract: A method of clocking a plurality of programmable, sequential data processing units, by adjusting the clock frequency of at least one of the programmable, sequential data processing units, without affecting the clock frequency of at least one other of the programmable, sequential data processing units.
    Type: Grant
    Filed: January 17, 2017
    Date of Patent: June 25, 2019
    Assignee: PACT XPP Schweiz AG
    Inventors: Martin Vorbach, Volker Baumgarte
  • Patent number: 10296488
    Abstract: A multi-processor having a plurality of data processing units and memory units has a bus system that selectively interconnects the processing units and the memory units.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: May 21, 2019
    Assignee: PACT XPP SCHWEIZ AG
    Inventor: Martin Vorbach