Patents Assigned to Pan Jit Americas, Inc.
  • Patent number: 7968907
    Abstract: An over-voltage protection thyristor has reduced junction capacitance making it suitable for use in high bandwidth applications. The reduced capacitance is achieved through the introduction of a deep base region. The deep base region has a graded doping concentration which reduces with depth into the substrate. The thyristor is useful for protecting sensitive electrical equipment from transient surges.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: June 28, 2011
    Assignee: Pan Jit Americas, Inc.
    Inventors: George Templeton, James Washburn
  • Patent number: 7638413
    Abstract: A method of fabricating a semiconductor uses chemical vapor deposition, or plasma-enhanced chemical vapor deposition, to deposit an amorphous silicon film on an exposed surface of a substrate, such as ASIC wafer. The amorphous silicon film is doped with nitrogen to reduce the conductivity of the film and/or to augment the breakdown voltage of the film. Nitrogen gas, N2, is activated or ionized in a reactor before it is deposited on the substrate.
    Type: Grant
    Filed: April 4, 2005
    Date of Patent: December 29, 2009
    Assignee: Pan Jit Americas, Inc.
    Inventors: Michael Kountz, George Engle, Steven Evers
  • Patent number: 7314832
    Abstract: A method of forming a film on a substrate. In accordance with the invention, an adhesion layer is formed on the substrate. The adhesion layer is chemically bonded to the substrate and has a textured surface. The film is then formed on the textured surface of the adhesion layer.
    Type: Grant
    Filed: April 4, 2005
    Date of Patent: January 1, 2008
    Assignee: Pan Jit Americas, Inc.
    Inventors: Michael Kountz, Randy Olsen, Michael Adamson