Patents Assigned to Panasonic Europe Ltd.
  • Methods and systems for reducing leakage current in semiconductor circuits
    Patent number: 7315201
    Abstract: Leakage currents across circuit components such as transistors are avoided by placing circuits into a low-leakage standby mode. The circuits are configured such that voltage differentials across leakage-prone circuit components are avoided when in standby mode. Various means are used to configure the circuits, such as configuration ports, data input lines, scan chains, etc. In embodiments containing reconfigurable devices, low-threshold transistors are used to implement the routing network.
    Type: Grant
    Filed: June 19, 2007
    Date of Patent: January 1, 2008
    Assignee: Panasonic Europe Ltd.
    Inventors: Alan Marshall, Andrea Olgiati, Anthony I. Stansfield
  • Methods and systems for reducing leakage current in semiconductor circuits
    Patent number: 7233197
    Abstract: Leakage currents across circuit components such as transistors are avoided by placing circuits into a low-leakage standby mode. The circuits are configured such that voltage differentials across leakage-prone circuit components are avoided when in standby mode. Various means are used to configure the circuits, such as configuration ports, data input lines, scan chains, etc. In embodiments containing reconfigurable devices, low-threshold transistors are used to implement the routing network.
    Type: Grant
    Filed: December 7, 2004
    Date of Patent: June 19, 2007
    Assignee: Panasonic Europe Ltd.
    Inventors: Alan Marshall, Andrea Olgiati, Anthony I. Stansfield