Abstract: A large current flowing out from video signal line driver is prevented whenever the video signal line is being grounded. The system includes a video signal line driver circuit transmitting video signal at pre-determined DC level, a large current prevention circuit detecting video signal line being shorted to ground and cut-off excessive current source out from video signal line driver circuit into video signal line, a start-up time enhancement circuit improving start-up time of ground detection circuit so that system start-up time is not limited by large current prevention circuit, and a switching threshold control circuit setting the switching threshold of large current prevention circuit and start-up time enhancement circuit.

Abstract: A slew rate control circuit in output driver of switching circuit to prevent power ground undershoot is introduced. The gate capacitance of lower power transistor is first fast discharged to ensure the operation of the output signal. The gate capacitance of lower power transistor is then slowly discharged to limit OUT SLEW RATE. The gate capacitance of lower power transistor is further slowly discharged when the power ground level is below common ground. With above controlling, the gate voltage slew rate of lower power transistor is reduced when the lower power transistor is almost fully turned OFF. Therefore, undershoot at the power ground is avoided. Similar slew rate control circuit can also be derived in output driver of switching circuit to prevent PVCC overshoot.

Abstract: A class D amplifier with output DC offset protection is disclosed. The DC offset protection receives a PWM input signals from the outputs and investigates the PWM output signals whether there is a large DC voltage difference is being reflected on the speaker load. If so, shutdown signal SD will be sent by the DC offset protection to the PWM control logic and gate driver, thus, shutting down the output of the class D system and preventing disastrous condition from being develop across the speaker.

Abstract: The purpose of the present invention is to provide a method for switching devices that enables the prediction of when a reverse current condition will occur regardless of voltage-mode or current-mode switching regulator. According to the present invention, the reverse current reduction technique is realized by implementing a circuit which takes in the PWM signal, switching regulator's output signal and the Supply Voltage, before outputting a logic signal to indicate the start of reverse current flow; an OR gate, which outputs a logic signal to control the turning ON/OFF of the PMOS buffer at the output.

Abstract: A method and exemplary apparatus that incorporate soft-start circuit together with adjustable output voltage control are introduced. By implementing a gradual increment of voltage steps/fast decrement, it can totally eliminate overshoot and limit in-rush current significantly at the initial startup and output voltage transition that happens after startup.

Abstract: A class D amplifier with output DC offset protection is disclosed. The DC offset protection receives a PWM input signals from the outputs and investigates the PWM output signals whether there is a large DC voltage difference is being reflected on the speaker load. If so, shutdown signal SD will be sent by the DC offset protection to the PWM control logic and gate driver, thus, shutting down the output of the class D system and preventing disastrous condition from being develop across the speaker.

Abstract: A slew rate control circuit in output driver of switching circuit to prevent power ground undershoot is introduced. The gate capacitance of lower power transistor is first fast discharged to ensure the operation of the output signal. The gate capacitance of lower power transistor is then slowly discharged to limit OUT SLEW RATE. The gate capacitance of lower power transistor is further slowly discharged when the power ground level is below common ground. With above controlling, the gate voltage slew rate of lower power transistor is reduced when the lower power transistor is almost fully turned OFF. Therefore, undershoot at the power ground is avoided. Similar slew rate control circuit can also be derived in output driver of switching circuit to prevent PVCC overshoot.

Abstract: An analog voltage latch for use in a controller for controlling a motor equipped electric bicycle, includes a window comparator for comparing an analog voltage latch output and an analog input voltage to produce a comparison result, an S-R latch for producing HIGH or LOW according to the comparison result, a selector for selecting an operation, an up/down counter for counting up or down according to the HIGH or LOW from the S-R latch, and holding the counted result according to the selector result, and a DA converter for converting the counted result to analog signal.

Abstract: A multiple branching configuration for output driver which achieves a fast settling time is provided. The multiple branching configuration comprises breaking down a typical output buffer stage into multiple branches; and utilizing multiple unit area sized transistors connected in parallel.

Abstract: A low power, high slew rate output driver circuit system is provided. The Circuit system comprises a cascade of two high-speed stages and a variable current biasing block. The combination of these two elements enables the realization of a high slew rate, yet low power output driver system.

Abstract: A backward pedaling detection circuit has a charging/discharging circuit for charging and discharging the external capacitor to meet the threshold voltage required by the hysteresis comparator, based on the input from the hall sensor. An internal pull-down circuit, based on the pedal speed, keeps the circuit from false triggering. A comparator with hysteresis (Schmitt trigger) sets the upper and lower threshold voltage and eliminates the effect of noise. AND gates act like switches to allow the selected signal to pass through.

Abstract: A smart protection circuit to prevent possible circuit malfunction or damage due to sudden power source voltage fluctuation is introduced. In case of quick and large voltage fluctuation in power supply, a control signal is activated to stop power transistor switching. When power supply is stable at a lower or higher operating voltage, the switching circuit is able to return to normal operation.

Abstract: A differential input Class D audio power amplifier incorporating a differential error amplifier is introduced. In response of differential input signal, this differential error amplifier generates two error signals, which subsequently generates final output signal. This architecture makes it the effect of feedback signal error correction doubled, which helps in achieving good THD. In addition, input port of this architecture is also compatible with single-ended signal. A pop noise suppression technique for this differential input Class D audio power amplifier is also introduced.

Abstract: An amplifier circuit that uses multiple power supplies includes a class D amplifier circuit, input bias generator and feedback network. By creating a voltage using the input bias generator at the non inverting terminal of the integrator, the inverting terminal of the integrator will follow the same voltage as the non inverting terminal. The offset voltage between the input signal DC bias and the input DC bias of the integrator will create an offset current flowing through the feedback resistors, thus resulting in the desired output DC bias.

Abstract: An electric motor speed controller for use in a bicycle includes a motor to provide a propulsion force to move the bicycle. The actual motor speed and a target motor speed are compared, and if the actual motor speed is lower, more current is supplied to the motor, and if the actual motor speed is higher, less current is supplied to the motor.

Abstract: An electric power-assist system for a manually operated vehicle, such as a bicycle, has a pedal with Hall sensors for producing a signal representing a rotational speed of the pedal, and an electric motor for power assisting the driving force of the bicycle. A speed counter, speed decision block, up/down counter, and comparator are provided so that the power assist by the electric motor increases or degreases, as the speed of the manual controlling device increases or decreases, respectively.

Abstract: An analog voltage latch for use in a controller for controlling a motor equipped electric bicycle, includes a window comparator for comparing an analog voltage latch output and an analog input voltage to produce a comparison result, an S-R latch for producing HIGH or LOW according to the comparison result, a selector for selecting an operation, an up/down counter for counting up or down according to the HIGH or LOW from the S-R latch, and holding the counted result according to the selector result, and a DA converter for converting the counted result to analog signal.

Abstract: A motor driver controller for controlling a motor equipped in an electric bicycle includes a power supply block for supplying power to the motor, a mode select block for selecting a mode between pedal assist mode and throttle/cruise mode. The pedal assist mode is controlled by a pedal assist block which detects the bicycle pedal speed. The throttle/cruise mode is controlled by a voltage track-and-follow block which produces a signal indicating the power to be supplied to the motor from the power supply block.

Abstract: A smart protection circuit to prevent possible circuit malfunction or damage due to sudden power source voltage fluctuation is introduced. In case of quick and large voltage fluctuation in power supply, a control signal is activated to stop power transistor switching. When power supply is stable at a lower or higher operating voltage, the switching circuit is able to return to normal operation.

Abstract: An electric motor speed controller for use in a bicycle includes a motor to provide a propulsion force to move the bicycle. The actual motor speed and a target motor speed are compared, and if the actual motor speed is lower, more current is supplied to the motor, and if the actual motor speed is higher, less current is supplied to the motor.