Patents Assigned to Paralec Inc.
  • Patent number: 6743319
    Abstract: An electronic circuit is made by printing a Parmod® composition on a temporary substrate and curing it to produce a pattern of metal conductors. The conductors are laminated to a substrate under heat and pressure to produce a laminate with the metal prepatterned into the desired circuit configuration. The conductor can also be coated with a polymer and cured to form a prepatterned substrate. Single and double-sided circuits or multilayers can be made this way.
    Type: Grant
    Filed: October 4, 2002
    Date of Patent: June 1, 2004
    Assignee: Paralec Inc.
    Inventor: Paul H. Kydd