Patents Assigned to PARRY LABS LLC
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Patent number: 12282796Abstract: Apparatus for performing group computing in a safety-critical operating environment (SCOE) includes a primary computing device, wherein the primary computing device includes a processor and a memory communicatively connected to the processor. The memory contains instructions configuring the processor to receive task data, determine a group computing need by comparing the task data against a preset group computing criterion, determine a hardware allocation as a function of the group computing need, create a virtual environment using a secondary computing device communicatively connected to the primary computing device, as a function of the hardware allocation, allocate at least a portion of the task data to the at least a secondary computing device, as a function of the group computing need, wherein the at least a portion of the task data is executed by the secondary computing device, and receive from the at least a secondary computing device a processing result.Type: GrantFiled: October 9, 2024Date of Patent: April 22, 2025Assignee: Parry Labs, LLCInventors: David Walsh, Charles Adams
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Patent number: 12261953Abstract: A smart communication system including a stream processor, a plurality of inputs that are time stamped with times from a chip scaled atomic clock, and a plurality of functional blocks implemented in non-transitory computer-readable mediums. The plurality of functional blocks include an encrypted private distributed ledger block, a fusion engine block, a hashing block, and a predictive analytics block. The plurality of inputs are hashed by the hashing block to produce hashed inputs and the hashed inputs are posted into the encrypted private distributed ledger block as a hash table. The predictive analytics block processes the hash table based upon a predetermined criteria for a particular user or based upon a predictive analytics determined criteria of the particular user to produce a data subset for the particular user. The fusion engine block organizes the data subset for the particular user into an organized data subset.Type: GrantFiled: January 14, 2023Date of Patent: March 25, 2025Assignee: PARRY LABS LLCInventor: Justin Nathaniel Hudson
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Patent number: 12181997Abstract: An apparatus for virtual integration environments, the apparatus including computing device configured to receive a software package for deployment, determine one or more recipients of the software package, select one or more operating environments as a function of the software package and the one or more recipients, wherein each operating environment of the one or more operating environments is a virtual representation of a system associated with each recipient of the one or more recipients, execute the software package within the one or more operating environments, generate performance data for each operating environment of the one or more operating environments, compare each performance data of the one or more performance data to one or more performance thresholds and graphically display at least the one or more performance data through a graphical user interface.Type: GrantFiled: March 15, 2024Date of Patent: December 31, 2024Assignee: Parry Labs, LLCInventors: David Walsh, Charles Adams, David Morse
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Patent number: 12158955Abstract: An apparatus for modification of operating environments, includes at least a processor and a memory communicatively connected to the at least a processor, the memory containing instructions configuring the processor to generate update data for one or more operating environments, append a digital signature associated with an update data source to the update data, identify at least one operating environment for receipt of the update data, wherein identification includes determining a compliance of one or more operating environments and identifying the at least one operating environment as a function of the compliance, authenticate the at least one operating environment, wherein authentication includes receiving an update log associated with the at least one operating environment and comparing the update log to a central log and transmit the update data to the at least one operating environment as a function of the authentication to modify the at least one operating environment.Type: GrantFiled: February 16, 2024Date of Patent: December 3, 2024Assignee: Parry Labs, LLCInventors: David Morse, David Walsh
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Patent number: 12147823Abstract: An apparatus for providing a safety-critical operating environment, comprising a host circuit having a processor and a memory containing instructions configuring the processor to operate a first partition within a virtual environment, by instantiating a hypervisor, generating a virtualization layer supervised by the hypervisor, and operating the first partition in the virtual environment using the virtualization layer, receive a configuration request containing a configuration request from the first partition, create a second partition within the virtual environment based on the configuration request by allocating processor time and a memory space for the second partition using the hypervisor based on the a partition policy, integrate a software module into the virtual environment by instantiating, within the second partition, a software image into a container having a non-preemptable container runtime, and verify a compliance of the integrated software module at the first partition.Type: GrantFiled: December 22, 2023Date of Patent: November 19, 2024Assignee: Parry Labs, LLCInventors: David Walsh, Charles Adams
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Patent number: 12147542Abstract: In an aspect, a field-deployable hardware apparatus includes a stackable housing, a graphical processing unit disposed within the stackable housing, the graphical processing unit comprising a first plurality of processor cores, a general-purpose processor disposed within the stackable housing, the general-purpose processor comprising a second plurality of processor cores, at least a binary unit system disposed within the stackable housing and connecting the graphical processing unit to the general-purpose processor, and a memory communicatively connected to at least a core of the first plurality of cores and the second plurality of cores, the memory containing instructions configuring the at least a core to execute a hypervisor, wherein the hypervisor generates a virtual environment on the at least a core.Type: GrantFiled: January 25, 2024Date of Patent: November 19, 2024Assignee: Parry Labs, LLCInventors: Marc Couture, Michael Palmer
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Patent number: 12062112Abstract: A system on a chip may include a GPU, a CPU, a dedicated memory for the CPU, an FPGA, a dedicated memory for the FPGA, a control and data bus assembly connecting the FPGA, the CPU, and the GPU, wherein the FPGA, the CPU, and the GPU are configured to interact using the control and data bus assembly and an API configured to allow the same code to run on the FPGA, the CPU, and the GPU, a VPX, a first HSIO connection connecting the GPU to the VPX, a second HSIO connection connecting the CPU to the VPX, and a third HSIO connection connecting the FPGA to the VPX.Type: GrantFiled: January 25, 2024Date of Patent: August 13, 2024Assignee: Parry Labs, LLCInventors: Marc Couture, Michael Palmer
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Patent number: 12027747Abstract: An antenna assembly including flexible antenna elements connected to a non-flexible antenna element which connects to a counterpoise where the non-flexible antenna element is between the counterpoise and the flexible antenna elements. The flexible antenna elements are a plurality of peripheral flexible antenna elements and a central flexible antenna element. The plurality of peripheral flexible antenna elements are separated from and surrounding the central flexible antenna element. The non-flexible antenna element is a biconical antenna, formed from two tapered shapes connected at a central feed point such that a constant electrical impedance as the currents radiate outward from the central feed point. A total length of the flexible antenna elements connected to the non-flexible antenna element is ?43.0 cm, and the flexible antenna elements connected to the non-flexible antenna element has a realized gain of at least 2 dB over at least a frequency range of 200-7000 MHz.Type: GrantFiled: December 18, 2022Date of Patent: July 2, 2024Assignee: PARRY LABS LLCInventors: Konstantinos M. Bontzos, David Daniel, Paul Virgilio
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Patent number: 12006075Abstract: A UAV heatsink assembly including two heat pipes, a first and second heat pipes including transfer and end portions, the end portions thermally connected to first and second metallic heat transfer elements, and a third metallic heat transfer element thermally connected to opposite ends of the heat pipes. A CPU thermally connected to the third metallic heat transfer element with first and second electrically insulating thermoplastic elements into which the respective first and second metallic components fit where the first and second electrically insulating thermoplastic elements are not between an outside ambient environment and the first and second metallic components. The heat pipes each include a wick structure and an embedded liquid providing thermal transport therein while at least some of the embedded liquids are above a threshold temperature between ?40° C. and 70° C. such that the UAV is at least operable above ?40° C. degrees and below 70° C.Type: GrantFiled: February 23, 2022Date of Patent: June 11, 2024Assignee: PARRY LABS LLCInventors: Jose' M. Bouza, II, Michael R. Walters