Patents Assigned to Parthus Technologies
  • Patent number: 6239634
    Abstract: A delay locked loop (DLL) is described comprising: a delay unit configured to delay an input clock signal by a specified amount to produce a delayed clock signal, said specified amount controlled by a control voltage applied to said delay unit; and a switch configured to clamp said control voltage to a predetermined value when said DLL is reset.
    Type: Grant
    Filed: January 10, 2000
    Date of Patent: May 29, 2001
    Assignee: Parthus Technologies
    Inventor: Stephen McDonagh